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-rw-r--r--arch/arm/cpu/armv7/mx6/Kconfig10
-rw-r--r--board/isee/igep0046/Kconfig12
-rw-r--r--board/isee/igep0046/MAINTAINERS6
-rw-r--r--board/isee/igep0046/Makefile9
-rw-r--r--board/isee/igep0046/igep0046.c102
-rw-r--r--board/isee/igep0046/mx6dl_igep0046_4x512.cfg131
-rw-r--r--configs/mx6dl_igep0046_2G_defconfig9
-rw-r--r--include/configs/igep0046.h77
8 files changed, 356 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index a3bb47e..570c3e5 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -151,6 +151,15 @@ config TARGET_GW_VENTANA
bool "gw_ventana"
select SUPPORT_SPL
+config TARGET_IGEP0046
+ bool "Support IMX6 igep0046"
+ select CPU_V7
+ select DM
+ select DM_THERMAL
+ select BOARD_EARLY_INIT_F
+ select BOARD_LATE_INIT
+ select MX6DL
+
config TARGET_KOSAGI_NOVENA
bool "Kosagi Novena"
select BOARD_LATE_INIT
@@ -502,6 +511,7 @@ source "board/freescale/mx6ull_ddr3_arm2/Kconfig"
source "board/grinn/liteboard/Kconfig"
source "board/phytec/pcm058/Kconfig"
source "board/gateworks/gw_ventana/Kconfig"
+source "board/isee/igep0046/Kconfig"
source "board/kosagi/novena/Kconfig"
source "board/samtec/vining_2000/Kconfig"
source "board/liebherr/mccmon6/Kconfig"
diff --git a/board/isee/igep0046/Kconfig b/board/isee/igep0046/Kconfig
new file mode 100644
index 0000000..5126b11
--- /dev/null
+++ b/board/isee/igep0046/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_IGEP0046
+
+config SYS_BOARD
+ default "igep0046"
+
+config SYS_VENDOR
+ default "isee"
+
+config SYS_CONFIG_NAME
+ default "igep0046"
+
+endif
diff --git a/board/isee/igep0046/MAINTAINERS b/board/isee/igep0046/MAINTAINERS
new file mode 100644
index 0000000..aefd87b
--- /dev/null
+++ b/board/isee/igep0046/MAINTAINERS
@@ -0,0 +1,6 @@
+IGEP0046 BOARD
+M: Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>
+S: Maintained
+F: board/isee/igep0046/igep0046.c
+F: include/configs/igep0046.h
+F: configs/mx6dl_igep0046_2G_defconfig
diff --git a/board/isee/igep0046/Makefile b/board/isee/igep0046/Makefile
new file mode 100644
index 0000000..ff2f3c7
--- /dev/null
+++ b/board/isee/igep0046/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
+#
+# (C) Copyright 2011 Freescale Semiconductor, Inc.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += igep0046.o
diff --git a/board/isee/igep0046/igep0046.c b/board/isee/igep0046/igep0046.c
new file mode 100644
index 0000000..ea0fb4a
--- /dev/null
+++ b/board/isee/igep0046/igep0046.c
@@ -0,0 +1,102 @@
+/*
+ * Config file for IGEP0046board
+ *
+ * Copyright (C) 2017, ISEE S.L - https://www.isee.biz/
+ *
+ * Author: Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/iomux.h>
+#include <asm/arch/mx6-pins.h>
+#include <linux/errno.h>
+#include <asm/gpio.h>
+#include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/boot_mode.h>
+#include <asm/arch/crm_regs.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mx6-ddr.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define GPIO_VERSION_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST)
+
+#define GPIO_LED_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST )
+
+int dram_init(void)
+{
+ gd->ram_size = imx_ddr_size();
+ return 0;
+}
+
+static iomux_v3_cfg_t const uart2_pads[] =
+{
+ MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+
+static iomux_v3_cfg_t const init_pads[] =
+{
+ /* PCB GPIO to Detect Module Version */
+ MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(GPIO_VERSION_PAD_CTRL),
+ MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(GPIO_VERSION_PAD_CTRL),
+ MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(GPIO_VERSION_PAD_CTRL),
+ MX6_PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(GPIO_VERSION_PAD_CTRL),
+ /* PCB GPIO LEDs */
+ MX6_PAD_DI0_PIN2__GPIO4_IO18 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL),
+ MX6_PAD_DI0_PIN3__GPIO4_IO19 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL),
+ MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL),
+ MX6_PAD_DI0_PIN15__GPIO4_IO17 | MUX_PAD_CTRL(GPIO_LED_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+ imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
+}
+
+int checkboard(void)
+{
+ puts("Module: IGEP0046\n");
+ return 0;
+}
+
+
+int board_early_init_f(void)
+{
+ setup_iomux_uart();
+
+ imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads));
+
+ /* configure LEDS */
+ gpio_set_value(IMX_GPIO_NR(4, 18), 1);
+ gpio_set_value(IMX_GPIO_NR(4, 19), 1);
+ gpio_set_value(IMX_GPIO_NR(4, 20), 1);
+ gpio_set_value(IMX_GPIO_NR(4, 17), 1);
+
+ return 0;
+}
+
+int board_init(void)
+{
+ return 0;
+}
+
+int board_late_init(void)
+{
+ puts("Hola Manel\n");
+ checkboard();
+ return 0;
+}
diff --git a/board/isee/igep0046/mx6dl_igep0046_4x512.cfg b/board/isee/igep0046/mx6dl_igep0046_4x512.cfg
new file mode 100644
index 0000000..db8e8e4
--- /dev/null
+++ b/board/isee/igep0046/mx6dl_igep0046_4x512.cfg
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) 2016 ISEE 2007 SL - http://www.isee.biz
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * Refer docs/README.imxmage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+
+BOOT_FROM sd
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type Address Value
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address absolute address of the register
+ * value value to be stored in the register
+ */
+DATA 4 0x020e0774 0x000C0000
+DATA 4 0x020e0754 0x00000000
+DATA 4 0x020e04ac 0x00020030
+DATA 4 0x020e04b0 0x00020030
+DATA 4 0x020e0464 0x00020030
+DATA 4 0x020e0490 0x00020030
+DATA 4 0x020e074c 0x00000030
+DATA 4 0x020e0494 0x00020030
+DATA 4 0x020e04a0 0x00000000
+DATA 4 0x020e04b4 0x00003030
+DATA 4 0x020e04b8 0x00003030
+DATA 4 0x020e076c 0x00000030
+DATA 4 0x020e0750 0x00020000
+DATA 4 0x020e04bc 0x00000030
+DATA 4 0x020e04c0 0x00000030
+DATA 4 0x020e04c4 0x00000030
+DATA 4 0x020e04c8 0x00000030
+DATA 4 0x020e04cc 0x00000030
+DATA 4 0x020e04d0 0x00000030
+DATA 4 0x020e04d4 0x00000030
+DATA 4 0x020e04d8 0x00000030
+DATA 4 0x020e0760 0x00020000
+DATA 4 0x020e0764 0x00000030
+DATA 4 0x020e0770 0x00000030
+DATA 4 0x020e0778 0x00000030
+DATA 4 0x020e077c 0x00000030
+DATA 4 0x020e0780 0x00000030
+DATA 4 0x020e0784 0x00000030
+DATA 4 0x020e078c 0x00000030
+DATA 4 0x020e0748 0x00000030
+DATA 4 0x020e0470 0x00020030
+DATA 4 0x020e0474 0x00020030
+DATA 4 0x020e0478 0x00020030
+DATA 4 0x020e047c 0x00020030
+DATA 4 0x020e0480 0x00020030
+DATA 4 0x020e0484 0x00020030
+DATA 4 0x020e0488 0x00020030
+DATA 4 0x020e048c 0x00020030
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b080c 0x001F001F
+DATA 4 0x021b0810 0x001F001F
+DATA 4 0x021b480c 0x001F001F
+DATA 4 0x021b4810 0x001F001F
+DATA 4 0x021b083c 0x4220021F
+DATA 4 0x021b0840 0x0207017E
+DATA 4 0x021b483c 0x4201020C
+DATA 4 0x021b4840 0x01660172
+DATA 4 0x021b0848 0x4A4D4E4D
+DATA 4 0x021b4848 0x4A4F5049
+DATA 4 0x021b0850 0x3F3C3D31
+DATA 4 0x021b4850 0x3238372B
+DATA 4 0x021b081c 0x33333333
+DATA 4 0x021b0820 0x33333333
+DATA 4 0x021b0824 0x33333333
+DATA 4 0x021b0828 0x33333333
+DATA 4 0x021b481c 0x33333333
+DATA 4 0x021b4820 0x33333333
+DATA 4 0x021b4824 0x33333333
+DATA 4 0x021b4828 0x33333333
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b48b8 0x00000800
+DATA 4 0x021b0004 0x0002002D
+DATA 4 0x021b0008 0x00333030
+DATA 4 0x021b000c 0x696C5323
+DATA 4 0x021b0010 0xB66E8B63
+DATA 4 0x021b0014 0x01FF00DB
+DATA 4 0x021b0018 0x00081740
+DATA 4 0x021b001c 0x00008000
+DATA 4 0x021b002c 0x000026d2
+DATA 4 0x021b0030 0x006C1023
+DATA 4 0x021b0040 0x00000047
+DATA 4 0x021b0000 0x841A0000
+DATA 4 0x021b001c 0x04008032
+DATA 4 0x021b001c 0x00008033
+DATA 4 0x021b001c 0x00048031
+DATA 4 0x021b001c 0x13208030
+DATA 4 0x021b001c 0x04008040
+DATA 4 0x021b0020 0x00007800
+DATA 4 0x021b0818 0x00022227
+DATA 4 0x021b4818 0x00022227
+DATA 4 0x021b0004 0x0002556D
+DATA 4 0x021b0404 0x00011006
+DATA 4 0x021b001c 0x00000000
+
+/* set the default clock gate to save power */
+DATA 4 0x020c4068 0x00C03F3F
+DATA 4 0x020c406c 0x0030FC03
+DATA 4 0x020c4070 0x0FFFC000
+DATA 4 0x020c4074 0x3FF00000
+DATA 4 0x020c4078 0x00FFF300
+DATA 4 0x020c407c 0x0F0000C3
+DATA 4 0x020c4080 0x000003FF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+DATA 4 0x020e0010 0xF00000CF
+/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+DATA 4 0x020e0018 0x007F007F
+DATA 4 0x020e001c 0x007F007F
diff --git a/configs/mx6dl_igep0046_2G_defconfig b/configs/mx6dl_igep0046_2G_defconfig
new file mode 100644
index 0000000..ae7a17c
--- /dev/null
+++ b/configs/mx6dl_igep0046_2G_defconfig
@@ -0,0 +1,9 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_TARGET_IGEP0046=y
+CONFIG_SYS_MALLOC_F=y
+CONFIG_SYS_MALLOC_F_LEN=0x400
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/isee/igep0046/mx6dl_igep0046_4x512.cfg,MX6DL,ENV_IS_NOWHERE"
+CONFIG_BOOTDELAY=2
+CONFIG_CMD_BOOTM=n
+CONFIG_CMD_BOOTD=n
diff --git a/include/configs/igep0046.h b/include/configs/igep0046.h
new file mode 100644
index 0000000..0e648de
--- /dev/null
+++ b/include/configs/igep0046.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2016 ISEE 2007 SL - http://www.isee.biz
+ *
+ * Configuration settings for the IGEP0046 board
+ *
+ * Author: Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_IGEP0046_H
+#define __CONFIG_IGEP0046_H
+
+#include "mx6_common.h"
+
+/* GPIO */
+#define CONFIG_MXC_GPIO
+
+/* UART Configs */
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART2_BASE
+#define CONSOLE_DEV "ttymxc2"
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+/* SOC specific Configs
+#if defined(CONFIG_MX6Q)
+#define CONFIG_DEFAULT_FDT_FILE "imx6q-igep-base0040rc2.dtb"
+#elif defined(CONFIG_MX6DL)
+#define CONFIG_DEFAULT_FDT_FILE "imx6dl-igep-base0040rc2.dtb"
+#endif
+*/
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
+
+/* Environment organization */
+#define CONFIG_ENV_SIZE (8 * 1024)
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT "Press ESC to abort autoboot in %d seconds\n", bootdelay
+#define CONFIG_AUTOBOOT_STOP_STR "\x1b"
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_STACKSIZE (128 * 1024)
+
+/* MMC Configs */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_USDHC_NUM 2
+#define CONFIG_DOS_PARTITION
+
+#endif /* __IGEP0046_CONFIG_H */
+
+
+
+
+
+
+