summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--drivers/mmc/fsl_esdhc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 4e43e3e..eba1de3 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -470,7 +470,7 @@ static int esdhc_init(struct mmc *mmc)
int timeout = 1000;
/* Reset the entire host controller */
- esdhc_write32(&regs->sysctl, SYSCTL_RSTA);
+ esdhc_setbits32(&regs->sysctl, SYSCTL_RSTA);
/* Wait until the controller is available */
while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTA) && --timeout)
@@ -481,7 +481,7 @@ static int esdhc_init(struct mmc *mmc)
esdhc_write32(&regs->scr, 0x00000040);
#endif
- esdhc_write32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
+ esdhc_setbits32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
/* Set the initial clock speed */
mmc_set_clock(mmc, 400000);
@@ -515,7 +515,7 @@ static void esdhc_reset(struct fsl_esdhc *regs)
unsigned long timeout = 100; /* wait max 100 ms */
/* reset the controller */
- esdhc_write32(&regs->sysctl, SYSCTL_RSTA);
+ esdhc_setbits32(&regs->sysctl, SYSCTL_RSTA);
/* hardware clears the bit when it is done */
while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTA) && --timeout)