diff options
| -rw-r--r-- | Makefile | 5 | ||||
| -rw-r--r-- | include/configs/mx6dl_arm2_iram.h | 168 |
2 files changed, 171 insertions, 2 deletions
@@ -3307,13 +3307,14 @@ mx53_evk_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mx53_evk freescale mx53 mx6dl_arm2_config \ +mx6dl_arm2_iram_config \ mx6q_arm2_config \ mx6q_arm2_mfg_config \ mx6q_arm2_lpddr2_config \ mx6q_arm2_lpddr2pop_config \ mx6q_arm2_iram_config : unconfig @[ -z "$(findstring iram_,$@)" ] || \ - { echo "TEXT_BASE = 0x00910000" >$(obj)board/freescale/mx6q_arm2/config.tmp ; \ + { echo "TEXT_BASE = 0x00907000" >$(obj)board/freescale/mx6q_arm2/config.tmp ; \ echo "... with iram configuration" ; \ } @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mx6q_arm2 freescale mx6 @@ -3321,7 +3322,7 @@ mx6q_arm2_iram_config : unconfig mx6q_sabresd_config \ mx6q_sabresd_iram_config : unconfig @[ -z "$(findstring iram_,$@)" ] || \ - { echo "TEXT_BASE = 0x00910000" >$(obj)board/freescale/mx6q_sabresd/config.tmp ; \ + { echo "TEXT_BASE = 0x00907000" >$(obj)board/freescale/mx6q_sabresd/config.tmp ; \ echo "... with iram configuration" ; \ } @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mx6q_sabresd freescale mx6 diff --git a/include/configs/mx6dl_arm2_iram.h b/include/configs/mx6dl_arm2_iram.h new file mode 100644 index 0000000..6bd3044 --- /dev/null +++ b/include/configs/mx6dl_arm2_iram.h @@ -0,0 +1,168 @@ +/* + * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. + * + * Configuration settings for the MX6Q Armadillo2 Freescale board. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/arch/mx6.h> + + /* High Level Configuration Options */ +#define CONFIG_ARMV7 /* This is armv7 Cortex-A9 CPU core */ + +#define CONFIG_MXC +#define CONFIG_MX6DL +#define CONFIG_MX6Q_ARM2 +#define CONFIG_FLASH_HEADER +#define CONFIG_FLASH_HEADER_OFFSET 0x400 +#define CONFIG_MX6_CLK32 32768 + +#define CONFIG_SKIP_RELOCATE_UBOOT +#define CONFIG_L2_OFF /* disable L2 cache first*/ + +/* +#define CONFIG_ARCH_CPU_INIT +#define CONFIG_ARCH_MMU +*/ + +#define CONFIG_MX6_HCLK_FREQ 24000000 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SYS_64BIT_VSPRINTF + +#define BOARD_LATE_INIT + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_REVISION_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024) +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Hardware drivers + */ +#define CONFIG_MXC_UART +#define CONFIG_UART_BASE_ADDR UART4_BASE_ADDR + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/*********************************************************** + * Command definition + ***********************************************************/ + +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_BOOTD /* bootd */ +#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_RUN /* run command in env variable */ + +/* Enable below configure when supporting nand */ +#define CONFIG_CMD_ENV + +#define CONFIG_REF_CLK_FREQ CONFIG_MX6_HCLK_FREQ + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_PRIME "FEC0" + +#define CONFIG_LOADADDR 0x10800000 /* loadaddr env var */ +#define CONFIG_RD_LOADADDR (CONFIG_LOADADDR + 0x300000) + +#define CONFIG_BOOTARGS "console=ttymxc3,115200 "\ + "rdinit=/linuxrc" + +#define CONFIG_BOOTCOMMAND "bootm" +#define CONFIG_ENV_IS_EMBEDDED +/* + * The MX51 3stack board seems to have a hardware "peculiarity" confirmed under + * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A + * controller inverted. The controller is capable of detecting and correcting + * this, but it needs 4 network packets for that. Which means, at startup, you + * will not receive answers to the first 4 packest, unless there have been some + * broadcasts on the network, or your board is on a hub. Reducing the ARP + * timeout from default 5 seconds to 200ms we speed up the initial TFTP + * transfer, should the user wish one, significantly. + */ +#define CONFIG_ARP_TIMEOUT 200UL + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_PROMPT "MX6SDL ARM2 IRAM U-Boot > " +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ + +#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x10010000 + +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_CMDLINE_EDITING + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (3 * 1024) /* regular stack */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 CSD0_DDR_BASE_ADDR +#define PHYS_SDRAM_1_SIZE (2u * 1024 * 1024 * 1024) +#define iomem_valid_addr(addr, size) \ + (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)) + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CONFIG_SYS_NO_FLASH + +/* Monitor at beginning of flash */ +/* #define CONFIG_FSL_ENV_IN_SF +*/ +/* #define CONFIG_FSL_ENV_IN_MMC */ + +#define CONFIG_ENV_SECT_SIZE (1 * 1024) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#define CONFIG_ENV_IS_NOWHERE + +#endif /* __CONFIG_H */ |