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-rw-r--r--arch/arm/cpu/armv7/omap3/board.c2
-rw-r--r--arch/arm/cpu/armv7/omap3/emif4.c2
-rw-r--r--arch/arm/cpu/armv7/omap3/sys_info.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 667e77f..08f8363 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -266,7 +266,7 @@ int __weak misc_init_r(void)
* Routine: wait_for_command_complete
* Description: Wait for posting to finish on watchdog
*****************************************************************************/
-void wait_for_command_complete(struct watchdog *wd_base)
+static void wait_for_command_complete(struct watchdog *wd_base)
{
int pending = 1;
do {
diff --git a/arch/arm/cpu/armv7/omap3/emif4.c b/arch/arm/cpu/armv7/omap3/emif4.c
index 6c7330a..a2aadc9 100644
--- a/arch/arm/cpu/armv7/omap3/emif4.c
+++ b/arch/arm/cpu/armv7/omap3/emif4.c
@@ -61,7 +61,7 @@ u32 get_sdr_cs_offset(u32 cs)
* - Init the emif4 module for DDR access
* - Early init routines, called from flash or SRAM.
*/
-void do_emif4_init(void)
+static void do_emif4_init(void)
{
unsigned int regval;
/* Set the DDR PHY parameters in PHY ctrl registers */
diff --git a/arch/arm/cpu/armv7/omap3/sys_info.c b/arch/arm/cpu/armv7/omap3/sys_info.c
index bef5f05..ce254cf 100644
--- a/arch/arm/cpu/armv7/omap3/sys_info.c
+++ b/arch/arm/cpu/armv7/omap3/sys_info.c
@@ -202,7 +202,7 @@ u32 __weak get_board_rev(void)
/********************************************************
* get_base(); get upper addr of current execution
*******************************************************/
-u32 get_base(void)
+static u32 get_base(void)
{
u32 val;