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-rw-r--r--arch/arm/cpu/armv7/mx6/clock.c10
-rw-r--r--arch/arm/include/asm/arch-mx6/clock.h1
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index edfc6b3..434a0b8 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -681,6 +681,16 @@ void enable_qspi_clk(int qspi_num)
break;
}
}
+
+void mxs_set_vadcclk()
+{
+ u32 reg = 0;
+
+ reg = readl(&imx_ccm->cscmr2);
+ reg &= ~MXC_CCM_CSCMR2_VID_CLK_SEL_MASK;
+ reg |= 0x19 << MXC_CCM_CSCMR2_VID_CLK_SEL_OFFSET;
+ writel(reg, &imx_ccm->cscmr2);
+}
#endif
#ifdef CONFIG_FEC_MXC
diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index bdf2ea0..ab03ab6 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -73,4 +73,5 @@ void enable_enet_clock(void);
void enable_lcdif_clock(uint32_t base_addr);
void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq);
void enable_lvds(uint32_t lcdif_base);
+void mxs_set_vadcclk(void);
#endif /* __ASM_ARCH_CLOCK_H */