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-rw-r--r--cpu/mpc85xx/Makefile3
-rw-r--r--cpu/mpc8xxx/cpu.c2
-rw-r--r--drivers/misc/fsl_law.c2
-rw-r--r--include/asm-ppc/processor.h2
4 files changed, 7 insertions, 2 deletions
diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile
index 8809302..1477eac 100644
--- a/cpu/mpc85xx/Makefile
+++ b/cpu/mpc85xx/Makefile
@@ -48,8 +48,9 @@ COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
# supports ddr1/2/3
COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
-COBJS-$(CONFIG_P2020) += ddr-gen3.o
COBJS-$(CONFIG_MPC8569) += ddr-gen3.o
+COBJS-$(CONFIG_P2020) += ddr-gen3.o
+COBJS-$(CONFIG_P1020) += ddr-gen3.o
COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o tlb.o \
diff --git a/cpu/mpc8xxx/cpu.c b/cpu/mpc8xxx/cpu.c
index 17aed62..fbab998 100644
--- a/cpu/mpc8xxx/cpu.c
+++ b/cpu/mpc8xxx/cpu.c
@@ -66,6 +66,8 @@ struct cpu_type cpu_type_list [] = {
CPU_TYPE_ENTRY(8572, 8572_E, 2),
CPU_TYPE_ENTRY(P2020, P2020, 2),
CPU_TYPE_ENTRY(P2020, P2020_E, 2),
+ CPU_TYPE_ENTRY(P1020, P1020, 2),
+ CPU_TYPE_ENTRY(P1020, P1020_E, 2),
#elif defined(CONFIG_MPC86xx)
CPU_TYPE_ENTRY(8610, 8610, 1),
CPU_TYPE_ENTRY(8641, 8641, 2),
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index f7d454d..af7b729 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
#define FSL_HW_NUM_LAWS 10
#elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
- defined(CONFIG_P2020)
+ defined(CONFIG_P2020) || defined(CONFIG_P1020)
#define FSL_HW_NUM_LAWS 12
#else
#error FSL_HW_NUM_LAWS not defined for this platform
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index a079b2d..5547245 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -1011,6 +1011,8 @@
#define SVR_8572_E 0x80E800
#define SVR_P2020 0x80E200
#define SVR_P2020_E 0x80EA00
+#define SVR_P1020 0x80E400
+#define SVR_P1020_E 0x80EC00
#define SVR_8610 0x80A000
#define SVR_8641 0x809000