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-rw-r--r--arch/arm/dts/exynos4210-trats.dts150
-rw-r--r--configs/omap3_logic_defconfig1
-rw-r--r--drivers/mmc/Kconfig12
-rw-r--r--drivers/mmc/Makefile1
-rw-r--r--drivers/mmc/ftsdc021_sdhci.c34
-rw-r--r--drivers/mmc/mmc-uclass.c25
-rw-r--r--drivers/mmc/omap_hsmmc.c18
-rw-r--r--drivers/power/pmic/Kconfig15
-rw-r--r--drivers/power/pmic/Makefile1
-rw-r--r--drivers/power/pmic/max8997.c61
-rw-r--r--drivers/power/pmic/max8998.c2
11 files changed, 273 insertions, 47 deletions
diff --git a/arch/arm/dts/exynos4210-trats.dts b/arch/arm/dts/exynos4210-trats.dts
index 2ed38f3..69c0605 100644
--- a/arch/arm/dts/exynos4210-trats.dts
+++ b/arch/arm/dts/exynos4210-trats.dts
@@ -19,14 +19,6 @@
};
aliases {
- i2c0 = "/i2c@13860000";
- i2c1 = "/i2c@13870000";
- i2c2 = "/i2c@13880000";
- i2c3 = "/i2c@13890000";
- i2c4 = "/i2c@138a0000";
- i2c5 = "/i2c@138b0000";
- i2c6 = "/i2c@138c0000";
- i2c7 = "/i2c@138d0000";
serial0 = "/serial@13800000";
console = "/serial@13820000";
mmc0 = "/sdhci@12510000";
@@ -122,3 +114,145 @@
status = "disabled";
};
};
+
+&i2c_5 {
+ clock-frequency = <100000>;
+ status = "okay";
+
+ max8997-pmic@66 {
+ compatible = "maxim,max8997";
+ reg = <0x66 0 0>;
+ voltage-regulators {
+ valive_reg: LDO2 {
+ regulator-name = "VALIVE_1.1V_C210";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ vusb_reg: LDO3 {
+ regulator-name = "VUSB_1.1V_C210";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ };
+
+ vmipi_reg: LDO4 {
+ regulator-name = "VMIPI_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vpda_reg: LDO6 {
+ regulator-name = "VCC_1.8V_PDA";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ };
+
+ vcam_reg: LDO7 {
+ regulator-name = "CAM_ISP_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vusbdac_reg: LDO8 {
+ regulator-name = "VUSB+VDAC_3.3V_C210";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vccpda_reg: LDO9 {
+ regulator-name = "VCC_2.8V_PDA";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ vpll_reg: LDO10 {
+ regulator-name = "VPLL_1.1V_C210";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ vtcam_reg: LDO12 {
+ regulator-name = "VT_CAM_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vcclcd_reg: LDO13 {
+ regulator-name = "VCC_3.3V_LCD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vlcd_reg: LDO15 {
+ regulator-name = "VLCD_2.2V";
+ regulator-min-microvolt = <2200000>;
+ regulator-max-microvolt = <2200000>;
+ };
+
+ camsensor_reg: LDO16 {
+ regulator-name = "CAM_SENSOR_IO_1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ vddq_reg: LDO21 {
+ regulator-name = "VDDQ_M1M2_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ varm_breg: BUCK1 {
+ /*
+ * HACK: The real name is VARM_1.2V_C210,
+ * but exynos-cpufreq does not support
+ * DT-based regulator lookup yet.
+ */
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ };
+
+ vint_breg: BUCK2 {
+ regulator-name = "VINT_1.1V_C210";
+ regulator-min-microvolt = <900000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-always-on;
+ };
+
+ camisp_breg: BUCK4 {
+ regulator-name = "CAM_ISP_CORE_1.2V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ vmem_breg: BUCK5 {
+ regulator-name = "VMEM_1.2V_C210";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-always-on;
+ };
+
+ vccsub_breg: BUCK7 {
+ regulator-name = "VCC_SUB_2.0V";
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-always-on;
+ };
+
+ safe1_sreg: ESAFEOUT1 {
+ regulator-name = "SAFEOUT1";
+ };
+
+ safe2_sreg: ESAFEOUT2 {
+ regulator-name = "SAFEOUT2";
+ regulator-boot-on;
+ };
+ };
+ };
+};
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 7479c52..fe762c0 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -34,6 +34,7 @@ CONFIG_CMD_UBI=y
CONFIG_ISO_PARTITION=y
CONFIG_EFI_PARTITION=y
CONFIG_MMC_OMAP_HS=y
+CONFIG_MMC_OMAP36XX_PINS=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_GADGET=y
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0c07781..01d1dbf 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -131,6 +131,18 @@ config MMC_OMAP_HS
If unsure, say N.
+config MMC_OMAP36XX_PINS
+ bool "Enable MMC1 on OMAP36xx/37xx"
+ depends on OMAP34XX && MMC_OMAP_HS
+ help
+ This enables extended-drain in the MMC/SD/SDIO1I/O and
+ GPIO-associated I/O cells (gpio_126, gpio_127, and gpio_129)
+ specific to the OMAP36xx/37xx using MMC1
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
config SH_SDHI
bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
depends on RMOBILE
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e78bd0d..8e922db 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -24,7 +24,6 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o
obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o
obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
-obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o
obj-$(CONFIG_GENERIC_MMC) += mmc.o
ifdef CONFIG_SUPPORT_EMMC_BOOT
obj-$(CONFIG_GENERIC_MMC) += mmc_boot.o
diff --git a/drivers/mmc/ftsdc021_sdhci.c b/drivers/mmc/ftsdc021_sdhci.c
deleted file mode 100644
index 4940ccb..0000000
--- a/drivers/mmc/ftsdc021_sdhci.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * (C) Copyright 2013 Faraday Technology
- * Kuo-Jung Su <dantesu@faraday-tech.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <sdhci.h>
-
-#ifndef CONFIG_FTSDC021_CLOCK
-#define CONFIG_FTSDC021_CLOCK clk_get_rate("MMC")
-#endif
-
-int ftsdc021_sdhci_init(u32 regbase)
-{
- struct sdhci_host *host = NULL;
- uint32_t freq = CONFIG_FTSDC021_CLOCK;
-
- host = calloc(1, sizeof(struct sdhci_host));
- if (!host) {
- puts("sdh_host malloc fail!\n");
- return -ENOMEM;
- }
-
- host->name = "FTSDC021";
- host->ioaddr = (void __iomem *)regbase;
- host->quirks = 0;
- host->max_clk = freq;
- add_sdhci(host, 0, 0);
-
- return 0;
-}
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index 2fe5d61..5bb446b 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -13,6 +13,8 @@
#include <dm/root.h>
#include "mmc_private.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_DM_MMC_OPS
int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
@@ -192,10 +194,15 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg)
{
struct blk_desc *bdesc;
struct udevice *bdev;
- int ret;
+ int ret, devnum = -1;
+
+#ifndef CONFIG_SPL_BUILD
+ /* Use the fixed index with aliase node's index */
+ fdtdec_get_alias_seq(gd->fdt_blob, "mmc", dev->of_offset, &devnum);
+#endif
- ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC, -1, 512,
- 0, &bdev);
+ ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC,
+ devnum, 512, 0, &bdev);
if (ret) {
debug("Cannot create block device\n");
return ret;
@@ -247,6 +254,17 @@ static int mmc_select_hwpart(struct udevice *bdev, int hwpart)
return mmc_switch_part(mmc, hwpart);
}
+static int mmc_blk_probe(struct udevice *dev)
+{
+ struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
+ int dev_num = block_dev->devnum;
+ struct mmc *mmc = find_mmc_device(dev_num);
+
+ if (!mmc)
+ return -ENODEV;
+ return mmc_init(mmc);
+}
+
static const struct blk_ops mmc_blk_ops = {
.read = mmc_bread,
#ifndef CONFIG_SPL_BUILD
@@ -260,6 +278,7 @@ U_BOOT_DRIVER(mmc_blk) = {
.name = "mmc_blk",
.id = UCLASS_BLK,
.ops = &mmc_blk_ops,
+ .probe = mmc_blk_probe,
};
#endif /* CONFIG_BLK */
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 5bb628d..b63ce56 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -38,6 +38,7 @@
#include <asm/arch/sys_proto.h>
#endif
#include <dm.h>
+#include <asm/arch-omap3/mux.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -102,6 +103,9 @@ static unsigned char mmc_board_init(struct mmc *mmc)
t2_t *t2_base = (t2_t *)T2_BASE;
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
u32 pbias_lite;
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+ u32 wkup_ctrl = readl(OMAP34XX_CTRL_WKUP_CTRL);
+#endif
pbias_lite = readl(&t2_base->pbias_lite);
pbias_lite &= ~(PBIASLITEPWRDNZ1 | PBIASLITEPWRDNZ0);
@@ -109,12 +113,26 @@ static unsigned char mmc_board_init(struct mmc *mmc)
/* for cairo board, we need to set up 1.8 Volt bias level on MMC1 */
pbias_lite &= ~PBIASLITEVMODE0;
#endif
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+ if (get_cpu_family() == CPU_OMAP36XX) {
+ /* Disable extended drain IO before changing PBIAS */
+ wkup_ctrl &= ~OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ;
+ writel(wkup_ctrl, OMAP34XX_CTRL_WKUP_CTRL);
+ }
+#endif
writel(pbias_lite, &t2_base->pbias_lite);
writel(pbias_lite | PBIASLITEPWRDNZ1 |
PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
&t2_base->pbias_lite);
+#ifdef CONFIG_MMC_OMAP36XX_PINS
+ if (get_cpu_family() == CPU_OMAP36XX)
+ /* Enable extended drain IO after changing PBIAS */
+ writel(wkup_ctrl |
+ OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ,
+ OMAP34XX_CTRL_WKUP_CTRL);
+#endif
writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
&t2_base->devconf0);
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index e7cc405..03fea07 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -61,6 +61,21 @@ config DM_PMIC_MAX8998
This config enables implementation of driver-model pmic uclass features
for PMIC MAX8998. The driver implements read/write operations.
+config PMIC_MAX8997
+ bool "Enable Driver Model for PMIC MAX8997"
+ depends on DM_PMIC
+ ---help---
+ This config enables implementation of driver-model pmic uclass features
+ for PMIC MAX8997. The driver implements read/write operations.
+ This is a Power Management IC with RTC, Fuel Gauge, MUIC control on Chip.
+ - 21x LDOs
+ - 12x GPIOs
+ - Haptic Motor driver
+ - RTC with two alarms
+ - Fueal Gauge and One backup battery charger
+ - MUIC
+ - Others
+
config PMIC_PM8916
bool "Enable Driver Model for Qualcomm PM8916 PMIC"
depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 8615939..40240c7 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
+obj-$(CONFIG_PMIC_MAX8997) += max8997.o
obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_RK808) += rk808.o
obj-$(CONFIG_PMIC_RN5T567) += rn5t567.o
diff --git a/drivers/power/pmic/max8997.c b/drivers/power/pmic/max8997.c
new file mode 100644
index 0000000..f749d7d
--- /dev/null
+++ b/drivers/power/pmic/max8997.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2016 Samsung Electronics
+ * Jaehoon Chung <jh80.chung@samsung.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <power/pmic.h>
+#include <power/max8997_pmic.h>
+#include <errno.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int max8997_reg_count(struct udevice *dev)
+{
+ return PMIC_NUM_OF_REGS;
+}
+
+static int max8997_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ int ret;
+
+ ret = dm_i2c_write(dev, reg, buff, len);
+ if (ret)
+ error("write error to device: %p register: %#x!", dev, reg);
+
+ return ret;
+}
+
+static int max8997_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+ int ret;
+
+ ret = dm_i2c_read(dev, reg, buff, len);
+ if (ret)
+ error("read error from device: %p register: %#x!", dev, reg);
+
+ return ret;
+}
+
+static struct dm_pmic_ops max8997_ops = {
+ .reg_count = max8997_reg_count,
+ .read = max8997_read,
+ .write = max8997_write,
+};
+
+static const struct udevice_id max8997_ids[] = {
+ { .compatible = "maxim,max8997" },
+ { },
+};
+
+U_BOOT_DRIVER(pmic_max8997) = {
+ .name = "max8997_pmic",
+ .id = UCLASS_PMIC,
+ .of_match = max8997_ids,
+ .ops = &max8997_ops,
+};
diff --git a/drivers/power/pmic/max8998.c b/drivers/power/pmic/max8998.c
index 3baa8da..7c4773c 100644
--- a/drivers/power/pmic/max8998.c
+++ b/drivers/power/pmic/max8998.c
@@ -7,10 +7,10 @@
#include <common.h>
#include <dm.h>
+#include <errno.h>
#include <i2c.h>
#include <power/pmic.h>
#include <power/max8998_pmic.h>
-#include <errno.h>
DECLARE_GLOBAL_DATA_PTR;
generated by cgit v1.1 at 2024-07-08 20:44:23 +0000