diff options
| -rw-r--r-- | board/coreboot/coreboot/Kconfig | 12 | ||||
| -rw-r--r-- | board/google/chromebook_link/Kconfig | 8 | ||||
| -rw-r--r-- | include/configs/chromebook_link.h | 4 |
3 files changed, 22 insertions, 2 deletions
diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig index e5ccf58..f2cd754 100644 --- a/board/coreboot/coreboot/Kconfig +++ b/board/coreboot/coreboot/Kconfig @@ -25,4 +25,16 @@ config DEFAULT_DEVICE_TREE This option selects the board Device Tree Source (dts) file in arch/x86/dts/ directory to be used to build U-Boot for coreboot. +config SYS_CAR_ADDR + hex "Board specific Cache-As-RAM (CAR) address" + default 0x19200000 + help + This option specifies the board specific Cache-As-RAM (CAR) address. + +config SYS_CAR_SIZE + hex "Board specific Cache-As-RAM (CAR) size" + default 0x4000 + help + This option specifies the board specific Cache-As-RAM (CAR) size. + endif diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index a9a55e8..33a31f3 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -30,4 +30,12 @@ config EARLY_POST_CROS_EC bool "Enable early post to Chrome OS EC" default y +config SYS_CAR_ADDR + hex + default 0xff7e0000 + +config SYS_CAR_SIZE + hex + default 0x20000 + endif diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 449f0c2..318f1a8 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -15,9 +15,9 @@ #include <configs/x86-common.h> -#define CONFIG_SYS_CAR_ADDR 0xff7e0000 -#define CONFIG_SYS_CAR_SIZE (128 * 1024) + #define CONFIG_SYS_MONITOR_LEN (1 << 20) + #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO |