diff options
| -rw-r--r-- | arch/arm/cpu/armv7/Kconfig | 9 | ||||
| -rw-r--r-- | include/configs/arndale.h | 1 | ||||
| -rw-r--r-- | include/configs/bcm_ep_board.h | 1 | ||||
| -rw-r--r-- | include/configs/jetson-tk1.h | 1 | ||||
| -rw-r--r-- | include/configs/ls1021aqds.h | 1 | ||||
| -rw-r--r-- | include/configs/ls1021atwr.h | 1 | ||||
| -rw-r--r-- | include/configs/mx7_common.h | 1 | ||||
| -rw-r--r-- | include/configs/sun6i.h | 1 | ||||
| -rw-r--r-- | include/configs/sun7i.h | 1 | ||||
| -rw-r--r-- | include/configs/sun8i.h | 12 | ||||
| -rw-r--r-- | include/configs/uniphier.h | 1 | ||||
| -rw-r--r-- | include/configs/vexpress_ca15_tc2.h | 1 |
12 files changed, 9 insertions, 22 deletions
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index 4390f59..b9c4f4e 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -41,6 +41,15 @@ config ARMV7_PSCI help Say Y here to enable PSCI support. +config ARMV7_PSCI_NR_CPUS + int "Maximum supported CPUs for PSCI" + depends on ARMV7_NONSEC + default 4 + help + The maximum number of CPUs supported in the PSCI firmware. + It is no problem to set a larger value than the number of + CPUs in the actual hardware implementation. + config ARMV7_LPAE bool "Use LPAE page table format" if EXPERT depends on CPU_V7 diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 18e59fc..b08f341 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -45,7 +45,6 @@ #define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index b5e5029..4b255d8 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -91,6 +91,5 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_CRC32_VERIFY -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 1eba74a..7c59790 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -60,7 +60,6 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* Reserve top 1M for secure RAM */ #define CONFIG_ARMV7_SECURE_BASE 0xfff00000 #define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 86969a1..abbd1c4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -10,7 +10,6 @@ #define CONFIG_LS102XA #define CONFIG_ARMV7_PSCI_1_0 -#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index d0fc7ff..511b0b3 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -10,7 +10,6 @@ #define CONFIG_LS102XA #define CONFIG_ARMV7_PSCI_1_0 -#define CONFIG_ARMV7_PSCI_NR_CPUS CONFIG_MAX_CPUS #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 52c0d0f..4b1077c 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -72,7 +72,6 @@ #define CONFIG_CMD_FUSE #define CONFIG_MXC_OCOTP -#define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE 0x00900000 #endif diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 41552c4..67a26c2 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -22,7 +22,6 @@ #define CONFIG_SUNXI_USB_PHYS 3 -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 63760c5..d8e6e20 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -20,7 +20,6 @@ #define CONFIG_SUNXI_USB_PHYS 3 -#define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index 151ffdc..011d70f 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -26,18 +26,6 @@ #define CONFIG_SUNXI_USB_PHYS 2 #endif -#ifndef CONFIG_MACH_SUN8I_A83T -#if defined(CONFIG_MACH_SUN8I_A23) -#define CONFIG_ARMV7_PSCI_NR_CPUS 2 -#elif defined(CONFIG_MACH_SUN8I_A33) -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 -#elif defined(CONFIG_MACH_SUN8I_H3) -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 -#else -#error Unsupported sun8i variant -#endif -#endif - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 66696c2..b3ca46b 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -12,7 +12,6 @@ #define __CONFIG_UNIPHIER_COMMON_H__ #define CONFIG_ARMV7_PSCI_1_0 -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index 9583e8c..b509a9c 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -16,6 +16,5 @@ #define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR -#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif |