diff options
| -rw-r--r-- | board/freescale/mx6q_sabreauto/flash_header.S | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/board/freescale/mx6q_sabreauto/flash_header.S b/board/freescale/mx6q_sabreauto/flash_header.S index af70dbe..0a5abc6 100644 --- a/board/freescale/mx6q_sabreauto/flash_header.S +++ b/board/freescale/mx6q_sabreauto/flash_header.S @@ -386,14 +386,14 @@ MXC_DCD_ITEM(42, MMDC_P1_BASE_ADDR + 0x80c, 0x001F001F) MXC_DCD_ITEM(43, MMDC_P1_BASE_ADDR + 0x810, 0x001F001F) # DQS gating, read delay, write delay calibration values # based on calibration compare of 0x00ffff00 -MXC_DCD_ITEM(44, MMDC_P0_BASE_ADDR + 0x83c, 0x42120218) -MXC_DCD_ITEM(45, MMDC_P0_BASE_ADDR + 0x840, 0x02030203) -MXC_DCD_ITEM(46, MMDC_P1_BASE_ADDR + 0x83C, 0x4302031A) -MXC_DCD_ITEM(47, MMDC_P1_BASE_ADDR + 0x840, 0x027B0249) -MXC_DCD_ITEM(48, MMDC_P0_BASE_ADDR + 0x848, 0x4A494C4A) -MXC_DCD_ITEM(49, MMDC_P1_BASE_ADDR + 0x848, 0x3A373345) -MXC_DCD_ITEM(50, MMDC_P0_BASE_ADDR + 0x850, 0x3F3F3F36) -MXC_DCD_ITEM(51, MMDC_P1_BASE_ADDR + 0x850, 0x48334736) +MXC_DCD_ITEM(44, MMDC_P0_BASE_ADDR + 0x83c, 0x42190217) +MXC_DCD_ITEM(45, MMDC_P0_BASE_ADDR + 0x840, 0x017B017B) +MXC_DCD_ITEM(46, MMDC_P1_BASE_ADDR + 0x83C, 0x4176017B) +MXC_DCD_ITEM(47, MMDC_P1_BASE_ADDR + 0x840, 0x015F016C) +MXC_DCD_ITEM(48, MMDC_P0_BASE_ADDR + 0x848, 0x4C4C4D4C) +MXC_DCD_ITEM(49, MMDC_P1_BASE_ADDR + 0x848, 0x4A4D4C48) +MXC_DCD_ITEM(50, MMDC_P0_BASE_ADDR + 0x850, 0x3F3F3F40) +MXC_DCD_ITEM(51, MMDC_P1_BASE_ADDR + 0x850, 0x3538382E) # read data bit delay MXC_DCD_ITEM(52, MMDC_P0_BASE_ADDR + 0x81c, 0x33333333) MXC_DCD_ITEM(53, MMDC_P0_BASE_ADDR + 0x820, 0x33333333) |