diff options
| -rw-r--r-- | cpu/blackfin/cpu.c | 11 | ||||
| -rw-r--r-- | cpu/blackfin/start.S | 18 | ||||
| -rw-r--r-- | lib_blackfin/u-boot.lds.S | 24 |
3 files changed, 30 insertions, 23 deletions
diff --git a/cpu/blackfin/cpu.c b/cpu/blackfin/cpu.c index 9bb6407..2c8fd86 100644 --- a/cpu/blackfin/cpu.c +++ b/cpu/blackfin/cpu.c @@ -25,13 +25,12 @@ ulong bfin_poweron_retx; __attribute__ ((__noreturn__)) void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) { - extern char _stext_l1; #ifndef CONFIG_BFIN_BOOTROM_USES_EVT1 /* Build a NOP slide over the LDR jump block. Whee! */ char nops[0xC]; serial_early_puts("NOP Slide\n"); memset(nops, 0x00, sizeof(nops)); - memcpy(&_stext_l1 - sizeof(nops), nops, sizeof(nops)); + memcpy((void *)L1_INST_SRAM, nops, sizeof(nops)); #endif if (!loaded_from_ldr) { @@ -40,10 +39,10 @@ void cpu_init_f(ulong bootflag, ulong loaded_from_ldr) * checking at build time. */ serial_early_puts("L1 Relocate\n"); - extern char _stext_l1, _etext_l1, _stext_l1_lma; - memcpy(&_stext_l1, &_stext_l1_lma, (&_etext_l1 - &_stext_l1)); - extern char _sdata_l1, _edata_l1, _sdata_l1_lma; - memcpy(&_sdata_l1, &_sdata_l1_lma, (&_edata_l1 - &_sdata_l1)); + extern char _stext_l1[], _text_l1_lma[], _text_l1_len[]; + memcpy(&_stext_l1, &_text_l1_lma, (unsigned long)_text_l1_len); + extern char _sdata_l1[], _data_l1_lma[], _data_l1_len[]; + memcpy(&_sdata_l1, &_data_l1_lma, (unsigned long)_data_l1_len); } #if defined(__ADSPBF537__) || defined(__ADSPBF536__) || defined(__ADSPBF534__) /* The BF537 bootrom will reset the EBIU_AMGCTL register on us diff --git a/cpu/blackfin/start.S b/cpu/blackfin/start.S index 7cbd632..44e2725 100644 --- a/cpu/blackfin/start.S +++ b/cpu/blackfin/start.S @@ -139,11 +139,10 @@ ENTRY(_start) .Ldma_and_reprogram: r0.l = LO(L1_INST_SRAM); r0.h = HI(L1_INST_SRAM); - r1.l = __initcode_start; - r1.h = __initcode_start; - r2.l = __initcode_end; - r2.h = __initcode_end; - r2 = r2 - r1; /* convert r2 into length of initcode */ + r1.l = __initcode_lma; + r1.h = __initcode_lma; + r2.l = __initcode_len; + r2.h = __initcode_len; r1 = r1 - r4; /* convert r1 from load address of initcode ... */ r1 = r1 + r5; /* ... to current (not load) address of initcode */ p3 = r0; @@ -173,12 +172,11 @@ ENTRY(_start) * takes care of clearing things for us. */ serial_early_puts("Zero BSS"); - r0.l = __bss_start; - r0.h = __bss_start; + r0.l = __bss_vma; + r0.h = __bss_vma; r1 = 0 (x); - r2.l = __bss_end; - r2.h = __bss_end; - r2 = r2 - r0; + r2.l = __bss_len; + r2.h = __bss_len; call _memset; .Lnorelocate: diff --git a/lib_blackfin/u-boot.lds.S b/lib_blackfin/u-boot.lds.S index 3604b78..8a9e8b1 100644 --- a/lib_blackfin/u-boot.lds.S +++ b/lib_blackfin/u-boot.lds.S @@ -65,16 +65,22 @@ MEMORY ENTRY(_start) SECTIONS { - .text : + .text.pre : { cpu/blackfin/start.o (.text .text.*) LDS_BOARD_TEXT + } >ram_code - __initcode_start = .; + .text.init : + { cpu/blackfin/initcode.o (.text .text.*) - __initcode_end = .; + } >ram_code + __initcode_lma = LOADADDR(.text.init); + __initcode_len = SIZEOF(.text.init); + .text : + { *(.text .text.*) } >ram @@ -113,7 +119,9 @@ SECTIONS . = ALIGN(4); __etext_l1 = .; } >l1_code AT>ram - __stext_l1_lma = LOADADDR(.text_l1); + __text_l1_lma = LOADADDR(.text_l1); + __text_l1_len = SIZEOF(.text_l1); + ASSERT (__text_l1_len <= L1_INST_SRAM_SIZE, "L1 text overflow!") .data_l1 : { @@ -124,16 +132,18 @@ SECTIONS . = ALIGN(4); __edata_l1 = .; } >l1_data AT>ram - __sdata_l1_lma = LOADADDR(.data_l1); + __data_l1_lma = LOADADDR(.data_l1); + __data_l1_len = SIZEOF(.data_l1); + ASSERT (__data_l1_len <= L1_DATA_B_SRAM_SIZE, "L1 data B overflow!") .bss : { . = ALIGN(4); - __bss_start = .; *(.sbss) *(.scommon) *(.dynbss) *(.bss .bss.*) *(COMMON) - __bss_end = .; } >ram + __bss_vma = ADDR(.bss); + __bss_len = SIZEOF(.bss); } |