diff options
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c | 45 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/clock.c | 6 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/cpu.c | 8 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/eflash.c | 14 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/reset.c | 2 | ||||
| -rw-r--r-- | arch/arm/cpu/arm926ejs/at91/timer.c | 8 |
7 files changed, 33 insertions, 51 deletions
diff --git a/arch/arm/cpu/arm926ejs/at91/Makefile b/arch/arm/cpu/arm926ejs/at91/Makefile index be9f6dd..f333753 100644 --- a/arch/arm/cpu/arm926ejs/at91/Makefile +++ b/arch/arm/cpu/arm926ejs/at91/Makefile @@ -28,6 +28,7 @@ LIB = $(obj)lib$(SOC).o COBJS-$(CONFIG_AT91CAP9) += at91cap9_devices.o COBJS-$(CONFIG_AT91SAM9260) += at91sam9260_devices.o COBJS-$(CONFIG_AT91SAM9G20) += at91sam9260_devices.o +COBJS-$(CONFIG_AT91SAM9XE) += at91sam9260_devices.o COBJS-$(CONFIG_AT91SAM9261) += at91sam9261_devices.o COBJS-$(CONFIG_AT91SAM9G10) += at91sam9261_devices.o COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c index c1822b7..54e8ee9 100644 --- a/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c +++ b/arch/arm/cpu/arm926ejs/at91/at91sam9260_devices.c @@ -45,70 +45,51 @@ void at91_serial0_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD0 */ at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD0 */ - writel(1 << AT91SAM9260_ID_US0, &pmc->pcer); + writel(1 << ATMEL_ID_USART0, &pmc->pcer); } void at91_serial1_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTB, 6, 1); /* TXD1 */ at91_set_a_periph(AT91_PIO_PORTB, 7, PUP); /* RXD1 */ - writel(1 << AT91SAM9260_ID_US1, &pmc->pcer); + writel(1 << ATMEL_ID_USART1, &pmc->pcer); } void at91_serial2_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTB, 8, 1); /* TXD2 */ at91_set_a_periph(AT91_PIO_PORTB, 9, PUP); /* RXD2 */ - writel(1 << AT91SAM9260_ID_US2, &pmc->pcer); + writel(1 << ATMEL_ID_USART2, &pmc->pcer); } -void at91_serial3_hw_init(void) +void at91_seriald_hw_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* DRXD */ at91_set_a_periph(AT91_PIO_PORTB, 15, 1); /* DTXD */ - writel(1 << AT91_ID_SYS, &pmc->pcer); -} - -void at91_serial_hw_init(void) -{ -#ifdef CONFIG_USART0 - at91_serial0_hw_init(); -#endif - -#ifdef CONFIG_USART1 - at91_serial1_hw_init(); -#endif - -#ifdef CONFIG_USART2 - at91_serial2_hw_init(); -#endif - -#ifdef CONFIG_USART3 /* DBGU */ - at91_serial3_hw_init(); -#endif + writel(1 << ATMEL_ID_SYS, &pmc->pcer); } #if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI) void at91_spi0_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */ at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */ at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */ /* Enable clock */ - writel(1 << AT91SAM9260_ID_SPI0, &pmc->pcer); + writel(1 << ATMEL_ID_SPI0, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTA, 3, 1); @@ -138,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask) void at91_spi1_hw_init(unsigned long cs_mask) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI1_MISO */ at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI1_MOSI */ at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI1_SPCK */ /* Enable clock */ - writel(1 << AT91SAM9260_ID_SPI1, &pmc->pcer); + writel(1 << ATMEL_ID_SPI1, &pmc->pcer); if (cs_mask & (1 << 0)) { at91_set_a_periph(AT91_PIO_PORTB, 3, 1); diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c b/arch/arm/cpu/arm926ejs/at91/clock.c index 7a10a77..06c63e5 100644 --- a/arch/arm/cpu/arm926ejs/at91/clock.c +++ b/arch/arm/cpu/arm926ejs/at91/clock.c @@ -57,7 +57,7 @@ static unsigned long at91_css_to_rate(unsigned long css) { switch (css) { case AT91_PMC_MCKR_CSS_SLOW: - return AT91_SLOW_CLOCK; + return CONFIG_SYS_AT91_SLOW_CLOCK; case AT91_PMC_MCKR_CSS_MAIN: return gd->main_clk_rate_hz; case AT91_PMC_MCKR_CSS_PLLA: @@ -145,7 +145,7 @@ static u32 at91_pll_rate(u32 freq, u32 reg) int at91_clock_init(unsigned long main_clock) { unsigned freq, mckr; - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; #ifndef CONFIG_SYS_AT91_MAIN_CLOCK unsigned tmp; /* @@ -159,7 +159,7 @@ int at91_clock_init(unsigned long main_clock) tmp = readl(&pmc->mcfr); } while (!(tmp & AT91_PMC_MCFR_MAINRDY)); tmp &= AT91_PMC_MCFR_MAINF_MASK; - main_clock = tmp * (AT91_SLOW_CLOCK / 16); + main_clock = tmp * (CONFIG_SYS_AT91_SLOW_CLOCK / 16); } #endif gd->main_clk_rate_hz = main_clock; diff --git a/arch/arm/cpu/arm926ejs/at91/cpu.c b/arch/arm/cpu/arm926ejs/at91/cpu.c index 5e30f1d..4c8664d 100644 --- a/arch/arm/cpu/arm926ejs/at91/cpu.c +++ b/arch/arm/cpu/arm926ejs/at91/cpu.c @@ -44,7 +44,7 @@ int arch_cpu_init(void) void arch_preboot_os(void) { ulong cpiv; - at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE; + at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT; cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir)); @@ -61,7 +61,7 @@ int print_cpuinfo(void) { char buf[32]; - printf("CPU: %s\n", CONFIG_SYS_AT91_CPU_NAME); + printf("CPU: %s\n", ATMEL_CPU_NAME); printf("Crystal frequency: %8s MHz\n", strmhz(buf, get_main_clk_rate())); printf("CPU clock : %8s MHz\n", @@ -80,7 +80,7 @@ int print_cpuinfo(void) */ void bootcount_store (ulong a) { - at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE; + at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff), &gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); @@ -88,7 +88,7 @@ void bootcount_store (ulong a) ulong bootcount_load (void) { - at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE; + at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR; ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]); if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) diff --git a/arch/arm/cpu/arm926ejs/at91/eflash.c b/arch/arm/cpu/arm926ejs/at91/eflash.c index 938c3b1..a6e0501 100644 --- a/arch/arm/cpu/arm926ejs/at91/eflash.c +++ b/arch/arm/cpu/arm926ejs/at91/eflash.c @@ -77,8 +77,8 @@ static u32 pagesize; unsigned long flash_init (void) { - at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00; - at91_dbu_t *dbu = (at91_dbu_t *) 0xfffff200; + at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC; + at91_dbu_t *dbu = (at91_dbu_t *) ATMEL_BASE_DBGU; u32 id, size, nplanes, planesize, nlocks; u32 addr, i, tmp=0; @@ -119,7 +119,7 @@ unsigned long flash_init (void) flash_info[0].sector_count = nlocks; flash_info[0].flash_id = id; - addr = AT91SAM9XE_FLASH_BASE; + addr = ATMEL_BASE_FLASH; for (i=0; i<nlocks; i++) { tmp = readl(&eefc->frr); /* words 4+nplanes+1.. */ flash_info[0].start[i] = addr; @@ -167,8 +167,8 @@ void flash_print_info (flash_info_t *info) int flash_real_protect (flash_info_t *info, long sector, int prot) { - at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00; - u32 pagenum = (info->start[sector]-AT91SAM9XE_FLASH_BASE)/pagesize; + at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC; + u32 pagenum = (info->start[sector]-ATMEL_BASE_FLASH)/pagesize; u32 i, tmp=0; debug("protect sector=%ld prot=%d\n", sector, prot); @@ -205,7 +205,7 @@ int flash_real_protect (flash_info_t *info, long sector, int prot) static u32 erase_write_page (u32 pagenum) { - at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00; + at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC; debug("erase+write page=%u\n", pagenum); @@ -249,7 +249,7 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) } /* now start copying data */ - pagenum = (addr-AT91SAM9XE_FLASH_BASE)/pagesize; + pagenum = (addr-ATMEL_BASE_FLASH)/pagesize; src32 = (u32 *) src; dst32 = (u32 *) addr; while (cnt > 0) { diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c index d2569d8..1f918b0 100644 --- a/arch/arm/cpu/arm926ejs/at91/reset.c +++ b/arch/arm/cpu/arm926ejs/at91/reset.c @@ -30,7 +30,7 @@ /* Reset the cpu by telling the reset controller to do so */ void reset_cpu(ulong ignored) { - at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE; + at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST /* Processor Reset */ diff --git a/arch/arm/cpu/arm926ejs/at91/timer.c b/arch/arm/cpu/arm926ejs/at91/timer.c index 82b8d7e..2634418 100644 --- a/arch/arm/cpu/arm926ejs/at91/timer.c +++ b/arch/arm/cpu/arm926ejs/at91/timer.c @@ -70,11 +70,11 @@ static inline unsigned long long usec_to_tick(unsigned long long usec) */ int timer_init(void) { - at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; + at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT; /* Enable PITC Clock */ - writel(1 << AT91_ID_SYS, &pmc->pcer); + writel(1 << ATMEL_ID_SYS, &pmc->pcer); /* Enable PITC */ writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr); @@ -90,7 +90,7 @@ int timer_init(void) */ unsigned long long get_ticks(void) { - at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE; + at91_pit_t *pit = (at91_pit_t *) ATMEL_BASE_PIT; ulong now = readl(&pit->piir); |