diff options
| -rw-r--r-- | arch/x86/cpu/ivybridge/bd82x6x.c | 14 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/early_me.c | 1 | ||||
| -rw-r--r-- | arch/x86/cpu/ivybridge/gma.c | 8 | ||||
| -rw-r--r-- | arch/x86/dts/chromebook_link.dts | 3 | ||||
| -rw-r--r-- | arch/x86/include/asm/arch-ivybridge/bd82x6x.h | 2 | ||||
| -rw-r--r-- | arch/x86/include/asm/cpu.h | 4 |
6 files changed, 17 insertions, 15 deletions
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 2591b20..2b172d4 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -9,6 +9,8 @@ #include <fdtdec.h> #include <malloc.h> #include <pch.h> +#include <syscon.h> +#include <asm/cpu.h> #include <asm/io.h> #include <asm/lapic.h> #include <asm/pci.h> @@ -149,8 +151,7 @@ void pch_iobp_update(struct udevice *dev, u32 address, u32 andvalue, static int bd82x6x_probe(struct udevice *dev) { - const void *blob = gd->fdt_blob; - int gma_node; + struct udevice *gma_dev; int ret; if (!(gd->flags & GD_FLG_RELOC)) @@ -159,15 +160,10 @@ static int bd82x6x_probe(struct udevice *dev) /* Cause the SATA device to do its init */ uclass_first_device(UCLASS_DISK, &dev); - gma_node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_GMA); - if (gma_node < 0) { - debug("%s: Cannot find GMA node\n", __func__); - return -EINVAL; - } - ret = dm_pci_bus_find_bdf(PCH_VIDEO_DEV, &dev); + ret = syscon_get_by_driver_data(X86_SYSCON_GMA, &gma_dev); if (ret) return ret; - ret = gma_func0_init(dev, blob, gma_node); + ret = gma_func0_init(gma_dev); if (ret) return ret; diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c index f0d6899..b1df77d 100644 --- a/arch/x86/cpu/ivybridge/early_me.c +++ b/arch/x86/cpu/ivybridge/early_me.c @@ -191,6 +191,7 @@ int intel_early_me_init_done(struct udevice *dev, struct udevice *me_dev, static const struct udevice_id ivybridge_syscon_ids[] = { { .compatible = "intel,me", .data = X86_SYSCON_ME }, + { .compatible = "intel,gma", .data = X86_SYSCON_GMA }, { } }; diff --git a/arch/x86/cpu/ivybridge/gma.c b/arch/x86/cpu/ivybridge/gma.c index f9b03f2..3b6291e 100644 --- a/arch/x86/cpu/ivybridge/gma.c +++ b/arch/x86/cpu/ivybridge/gma.c @@ -538,8 +538,10 @@ static int gma_pm_init_pre_vbios(void *gtt_bar, int rev) return 0; } -int gma_pm_init_post_vbios(int rev, void *gtt_bar, const void *blob, int node) +int gma_pm_init_post_vbios(struct udevice *dev, int rev, void *gtt_bar) { + const void *blob = gd->fdt_blob; + int node = dev->of_offset; u32 reg32, cycle_delay; debug("GT Power Management Init (post VBIOS)\n"); @@ -794,7 +796,7 @@ void sandybridge_setup_graphics(struct udevice *dev, struct udevice *video_dev) writel(reg32, MCHBAR_REG(0x5418)); } -int gma_func0_init(struct udevice *dev, const void *blob, int node) +int gma_func0_init(struct udevice *dev) { #ifdef CONFIG_VIDEO ulong start; @@ -839,7 +841,7 @@ int gma_func0_init(struct udevice *dev, const void *blob, int node) debug("BIOS ran in %lums\n", get_timer(start)); #endif /* Post VBIOS init */ - ret = gma_pm_init_post_vbios(rev, gtt_bar, blob, node); + ret = gma_pm_init_post_vbios(dev, rev, gtt_bar); if (ret) return ret; diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts index 662e5d9..d148d6e 100644 --- a/arch/x86/dts/chromebook_link.dts +++ b/arch/x86/dts/chromebook_link.dts @@ -209,7 +209,8 @@ u-boot,dm-pre-reloc; }; - gma { + gma@2,0 { + reg = <0x00001000 0 0 0 0>; compatible = "intel,gma"; intel,dp_hotplug = <0 0 0x06>; intel,panel-port-select = <1>; diff --git a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h index 2607da6..e866580 100644 --- a/arch/x86/include/asm/arch-ivybridge/bd82x6x.h +++ b/arch/x86/include/asm/arch-ivybridge/bd82x6x.h @@ -7,6 +7,6 @@ #ifndef _ASM_ARCH_BD82X6X_H #define _ASM_ARCH_BD82X6X_H -int gma_func0_init(struct udevice *dev, const void *blob, int node); +int gma_func0_init(struct udevice *dev); #endif diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 76cdf47..18b0345 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -47,11 +47,13 @@ enum { /* * System controllers in an x86 system. We mostly need to just find these and - * use them on PCI. At some point these might have their own uclass. + * use them on PCI. At some point these might have their own uclass (e.g. + * UCLASS_VIDEO for the GMA device). */ enum { X86_NONE, X86_SYSCON_ME, /* Intel Management Engine */ + X86_SYSCON_GMA, /* Intel Graphics Media Accelerator */ }; struct cpuid_result { |