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author | Simon Glass <sjg@chromium.org> | 2016-11-25 20:15:53 -0700 |
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committer | Simon Glass <sjg@chromium.org> | 2016-12-20 08:09:55 +1300 |
commit | e0ff85513858246e5378e4e3676ef6128452c4f6 (patch) | |
tree | 8265f67f1246bf73f351a785ea27bfc305384f7e /tools/binman/etype/intel_descriptor.py | |
parent | 4f44304b0bd881f79252c7b7d2fb796e31ca3b0a (diff) | |
download | u-boot-imx-e0ff85513858246e5378e4e3676ef6128452c4f6.zip u-boot-imx-e0ff85513858246e5378e4e3676ef6128452c4f6.tar.gz u-boot-imx-e0ff85513858246e5378e4e3676ef6128452c4f6.tar.bz2 |
binman: Add support for building x86 ROMs
The structure of x86 ROMs is pretty complex. There are various binary blobs
to place in the image. Microcode requires special handling so that it is
available to very early code and can be used without any memory whatsoever.
Add support for the various entry types that are currently needed, along
with some tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'tools/binman/etype/intel_descriptor.py')
-rw-r--r-- | tools/binman/etype/intel_descriptor.py | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/tools/binman/etype/intel_descriptor.py b/tools/binman/etype/intel_descriptor.py new file mode 100644 index 0000000..7f4ea0b --- /dev/null +++ b/tools/binman/etype/intel_descriptor.py @@ -0,0 +1,55 @@ +# Copyright (c) 2016 Google, Inc +# Written by Simon Glass <sjg@chromium.org> +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Entry-type module for 'u-boot' +# + +import struct + +from entry import Entry +from blob import Entry_blob + +FD_SIGNATURE = struct.pack('<L', 0x0ff0a55a) +MAX_REGIONS = 5 + +(REGION_DESCRIPTOR, REGION_BIOS, REGION_ME, REGION_GBE, + REGION_PDATA) = range(5) + +class Region: + def __init__(self, data, frba, region_num): + pos = frba + region_num * 4 + val = struct.unpack('<L', data[pos:pos + 4])[0] + self.base = (val & 0xfff) << 12 + self.limit = ((val & 0x0fff0000) >> 4) | 0xfff + self.size = self.limit - self.base + 1 + +class Entry_intel_descriptor(Entry_blob): + """Intel flash descriptor block (4KB) + + This is placed at the start of flash and provides information about + the SPI flash regions. In particular it provides the base address and + size of the ME region, allowing us to place the ME binary in the right + place. + """ + def __init__(self, image, etype, node): + Entry_blob.__init__(self, image, etype, node) + self._regions = [] + + def GetDefaultFilename(self): + return 'descriptor.bin' + + def GetPositions(self): + pos = self.data.find(FD_SIGNATURE) + if pos == -1: + self.Raise('Cannot find FD signature') + flvalsig, flmap0, flmap1, flmap2 = struct.unpack('<LLLL', + self.data[pos:pos + 16]) + frba = ((flmap0 >> 16) & 0xff) << 4 + for i in range(MAX_REGIONS): + self._regions.append(Region(self.data, frba, i)) + + # Set the offset for ME only, for now, since the others are not used + return {'intel-me': [self._regions[REGION_ME].base, + self._regions[REGION_ME].size]} |