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| author | Aneesh Bansal <aneesh.bansal@freescale.com> | 2015-12-08 13:54:30 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-12-15 08:57:35 +0800 |
| commit | 3a4800a5968f689788d70f7decb000a3d3e1a2f4 (patch) | |
| tree | 45e595cb658089cc2776fa3c7e99be7e04031086 /test | |
| parent | 9711f52806655bcfa28fe5594b91fed430beb72e (diff) | |
| download | u-boot-imx-3a4800a5968f689788d70f7decb000a3d3e1a2f4.zip u-boot-imx-3a4800a5968f689788d70f7decb000a3d3e1a2f4.tar.gz u-boot-imx-3a4800a5968f689788d70f7decb000a3d3e1a2f4.tar.bz2 | |
drivers/crypto/fsl: fix endianness issue in RNG
For Setting and clearing the bits in SEC Block registers
sec_clrbits32() and sec_setbits32() are used which work as
per endianness of CAAM block.
So these must be used with SEC register address as argument.
If the value is read in a local variable, then the functions
will not behave correctly where endianness of CAAM and core is
different.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
CC: Alex Porosanu <alexandru.porosanu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'test')
0 files changed, 0 insertions, 0 deletions