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| author | Marcel Ziswiler <marcel@ziswiler.com> | 2014-03-11 18:43:57 +0100 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2014-04-07 20:15:29 +0200 |
| commit | 25839c01975b865f2e6a0dac056d207e9288a281 (patch) | |
| tree | e8a0d4efca867a6b74d51983feeb9cd6c756b065 /snapshot.commit | |
| parent | 42f5e8a25ad1a7504502e7f11ff4d563f1d6f1dd (diff) | |
| download | u-boot-imx-25839c01975b865f2e6a0dac056d207e9288a281.zip u-boot-imx-25839c01975b865f2e6a0dac056d207e9288a281.tar.gz u-boot-imx-25839c01975b865f2e6a0dac056d207e9288a281.tar.bz2 | |
arm: vf610: fix anadig register struct
The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl)
and further contained a too short reserved field causing further miss-
alignment (reserved_0x0C4[7]). Also, rename all the reserved fields
and using a memory offset based scheme for.
Discovered and tested by temporarily putting the following debug
instrumentation into board_init():
struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR;
printf("&anadig->pll3_ctrl=0x%p\n", &anadig->pll3_ctrl);
printf("&anadig->pll5_ctrl=0x%p\n", &anadig->pll5_ctrl);
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner <stefan@agner.ch>
Diffstat (limited to 'snapshot.commit')
0 files changed, 0 insertions, 0 deletions