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authorTom Rini <trini@ti.com>2013-07-12 10:36:48 -0400
committerTom Rini <trini@ti.com>2013-07-12 10:36:48 -0400
commitfbbbc86e8ebac4f42f4ca39ceba80cea27c983bc (patch)
tree9c91526cefd027d9bd964572d4f92bd2d1376c5d /include
parentd72da1582895ca226b995758426ec3769b54a9b8 (diff)
parentefc284e32503b240dbd35c6e8b8d098d702b4be7 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/beaver.h14
-rw-r--r--include/configs/cardhu.h14
-rw-r--r--include/configs/dalmore.h14
-rw-r--r--include/configs/exynos5250-dt.h12
-rw-r--r--include/configs/harmony.h9
-rw-r--r--include/configs/m28evk.h1
-rw-r--r--include/configs/mx51evk.h4
-rw-r--r--include/configs/mx53ard.h4
-rw-r--r--include/configs/mx53loco.h4
-rw-r--r--include/configs/mx6qsabreauto.h2
-rw-r--r--include/configs/mx6qsabrelite.h4
-rw-r--r--include/configs/mx6sabre_common.h (renamed from include/configs/mx6qsabre_common.h)1
-rw-r--r--include/configs/mx6sabresd.h (renamed from include/configs/mx6qsabresd.h)2
-rw-r--r--include/configs/mx6slevk.h4
-rw-r--r--include/configs/nitrogen6x.h6
-rw-r--r--include/configs/origen.h9
-rw-r--r--include/configs/palmtreo680.h286
-rw-r--r--include/configs/smdkv310.h8
-rw-r--r--include/configs/tegra114-common.h3
-rw-r--r--include/configs/tegra30-common.h3
-rw-r--r--include/configs/trats.h2
-rw-r--r--include/configs/ventana.h9
-rw-r--r--include/configs/vf610twr.h93
-rw-r--r--include/configs/wandboard.h6
-rw-r--r--include/fdtdec.h3
-rw-r--r--include/power/max77686_pmic.h2
26 files changed, 492 insertions, 27 deletions
diff --git a/include/configs/beaver.h b/include/configs/beaver.h
index d51f5f8..628d5d3 100644
--- a/include/configs/beaver.h
+++ b/include/configs/beaver.h
@@ -71,6 +71,20 @@
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* USB networking support */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
+/* General networking support */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index f3916de..142d20b 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -70,6 +70,20 @@
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* USB networking support */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
+/* General networking support */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h
index 6d7a187..b6e0161 100644
--- a/include/configs/dalmore.h
+++ b/include/configs/dalmore.h
@@ -75,6 +75,20 @@
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
+/* USB Host support */
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_TEGRA
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_USB
+
+/* USB networking support */
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
+/* General networking support */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index e2a096b..582c584 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -86,9 +86,9 @@
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
/* select serial console configuration */
-#define CONFIG_SERIAL3 /* use SERIAL 3 */
#define CONFIG_BAUDRATE 115200
#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
+#define CONFIG_SILENT_CONSOLE
/* Enable keyboard */
#define CONFIG_CROS_EC /* CROS_EC protocol */
@@ -120,6 +120,7 @@
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SKIP_LOWLEVEL_INIT
/* PWM */
#define CONFIG_PWM
@@ -153,6 +154,7 @@
#define CONFIG_USB_STORAGE
/* USB boot mode */
+#define CONFIG_USB_BOOTING
#define EXYNOS_COPY_USB_FNPTR_ADDR 0x02020070
#define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002
#define EXYNOS_IRAM_SECONDARY_BASE 0x02020018
@@ -168,8 +170,10 @@
#define CONFIG_SPL
#define COPY_BL2_FNPTR_ADDR 0x02020030
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+
/* specific .lds file */
-#define CONFIG_SPL_LDSCRIPT "board/samsung/smdk5250/smdk5250-uboot-spl.lds"
+#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x02023400
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
@@ -245,7 +249,7 @@
#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
-#define OM_STAT (0x1f << 1)
+#define CONFIG_SPI_BOOTING
#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
@@ -257,7 +261,7 @@
#define CONFIG_IRAM_STACK 0x02050000
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
+#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
/* I2C */
#define CONFIG_SYS_I2C_INIT_BOARD
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 0c73f86..27aaf16 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -49,6 +49,7 @@
#define CONFIG_MACH_TYPE MACH_TYPE_HARMONY
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */
/* SD/MMC */
#define CONFIG_MMC
@@ -83,6 +84,14 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
+/* LCD support */
+#define CONFIG_LCD
+#define CONFIG_PWM_TEGRA
+#define CONFIG_VIDEO_TEGRA
+#define LCD_BPP LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_CONSOLE_SCROLL_LINES 10
+
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 5b3fa43..10ccc3b 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -70,6 +70,7 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 13d1839..4383375d 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -162,8 +162,8 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index b0a965f..fa160e4 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -118,8 +118,8 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"update_sd_firmware_filename=u-boot.imx\0" \
"update_sd_firmware=" \
"if test ${ip_dyn} = yes; then " \
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index a4b610f..cc31e9b 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -124,8 +124,8 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
"mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
"loadbootscript=" \
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 76f7812..a396acf 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -30,7 +30,7 @@
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
-#include "mx6qsabre_common.h"
+#include "mx6sabre_common.h"
#define CONFIG_SYS_FSL_USDHC_NUM 2
#if defined(CONFIG_ENV_IS_IN_MMC)
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
index b814418..c7db81d 100644
--- a/include/configs/mx6qsabrelite.h
+++ b/include/configs/mx6qsabrelite.h
@@ -170,8 +170,8 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6sabre_common.h
index bfaa420..53cc559 100644
--- a/include/configs/mx6qsabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -18,7 +18,6 @@
#define __MX6QSABRE_COMMON_CONFIG_H
#define CONFIG_MX6
-#define CONFIG_MX6Q
#include "mx6_common.h"
diff --git a/include/configs/mx6qsabresd.h b/include/configs/mx6sabresd.h
index 44f07cb..76675f4 100644
--- a/include/configs/mx6qsabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -24,7 +24,7 @@
#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
-#include "mx6qsabre_common.h"
+#include "mx6sabre_common.h"
#define CONFIG_SYS_FSL_USDHC_NUM 3
#if defined(CONFIG_ENV_IS_IN_MMC)
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 19dcdd6..55e3ad9 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -73,8 +73,8 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index aea91bc..74df66c 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -276,8 +276,6 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
-#define CONFIG_SYS_DCACHE_OFF
-
#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif
@@ -287,4 +285,8 @@
#define CONFIG_CMD_TIME
#define CONFIG_SYS_ALT_MEMTEST
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_SUPPORT_RAW_INITRD
+#define CONFIG_CMD_FS_GENERIC
+
#endif /* __CONFIG_H */
diff --git a/include/configs/origen.h b/include/configs/origen.h
index e179911..5013aee 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -36,6 +36,7 @@
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_EARLY_INIT_F
/* Keep L2 Cache Disabled */
#define CONFIG_L2_OFF 1
@@ -67,6 +68,8 @@
#define CONFIG_BAUDRATE 115200
#define EXYNOS4_DEFAULT_UART_OFFSET 0x020000
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
@@ -147,7 +150,10 @@
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
#define CONFIG_DOS_PARTITION 1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
+#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
+
+#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
/* U-boot copy size from boot Media to DRAM.*/
#define COPY_BL2_SIZE 0x80000
@@ -156,4 +162,5 @@
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
+
#endif /* __CONFIG_H */
diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h
new file mode 100644
index 0000000..2ab6fd2
--- /dev/null
+++ b/include/configs/palmtreo680.h
@@ -0,0 +1,286 @@
+/*
+ * Palm Treo 680 configuration file
+ *
+ * Copyright (C) 2013 Mike Dunn <mikedunn@newsguy.com>
+ *
+ * This file is released under the terms of GPL v2 and any later version.
+ * See the file COPYING in the root directory of the source tree for details.
+ *
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Board Configuration Options
+ */
+#define CONFIG_CPU_PXA27X
+#define CONFIG_PALMTREO680
+#define CONFIG_MACH_TYPE MACH_TYPE_TREO680
+
+#define CONFIG_SYS_MALLOC_LEN (4096*1024)
+
+#define CONFIG_LZMA
+
+/*
+ * Serial Console Configuration
+ */
+#define CONFIG_PXA_SERIAL
+#define CONFIG_FFUART 1
+#define CONFIG_BAUDRATE 9600
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CONFIG_CONS_INDEX 3
+
+/* we have nand (although technically nand *is* flash...) */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_LCD
+/* #define CONFIG_KEYBOARD */ /* TODO */
+
+/*
+ * Bootloader Components Configuration
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_SOURCE
+#undef CONFIG_CMD_XIMG
+
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NAND
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+
+/*
+ * MMC Card Configuration
+ */
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_PXA_MMC_GENERIC
+
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_DOS_PARTITION
+#endif
+
+/*
+ * LCD
+ */
+#ifdef CONFIG_LCD
+#define CONFIG_PXA_LCD
+#define CONFIG_ACX544AKN
+#define CONFIG_LCD_LOGO
+#define CONFIG_SYS_LCD_PXA_NO_L_BIAS /* don't configure GPIO77 as L_BIAS */
+#define LCD_BPP LCD_COLOR16
+#define CONFIG_FB_ADDR 0x5c000000 /* internal SRAM */
+#define CONFIG_CMD_BMP
+#define CONFIG_SPLASH_SCREEN /* requires "splashimage" env var */
+#define CONFIG_SPLASH_SCREEN_ALIGN /* requires "splashpos" env var */
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
+
+#endif
+
+/*
+ * KGDB
+ */
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * HUSH Shell Configuration
+ */
+#define CONFIG_SYS_HUSH_PARSER 1
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+#define CONFIG_SYS_LONGHELP
+#ifdef CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT "$ "
+#else
+#define CONFIG_SYS_PROMPT "=> "
+#endif
+#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_DEVICE_NULLDEV 1
+
+/*
+ * Clock Configuration
+ */
+#undef CONFIG_SYS_CLKS_IN_HZ
+#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
+
+/*
+ * Stack sizes
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*
+ * DRAM Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
+#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+
+#define CONFIG_SYS_DRAM_BASE 0xa0000000
+#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */
+
+#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
+#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+
+/*
+ * GPIO settings
+ */
+#define CONFIG_SYS_GAFR0_L_VAL 0x0E000000
+#define CONFIG_SYS_GAFR0_U_VAL 0xA500001A
+#define CONFIG_SYS_GAFR1_L_VAL 0x60000002
+#define CONFIG_SYS_GAFR1_U_VAL 0xAAA07959
+#define CONFIG_SYS_GAFR2_L_VAL 0x02AAAAAA
+#define CONFIG_SYS_GAFR2_U_VAL 0x41440F08
+#define CONFIG_SYS_GAFR3_L_VAL 0x56AA95FF
+#define CONFIG_SYS_GAFR3_U_VAL 0x00001401
+#define CONFIG_SYS_GPCR0_VAL 0x1FF80400
+#define CONFIG_SYS_GPCR1_VAL 0x03003FC1
+#define CONFIG_SYS_GPCR2_VAL 0x01C1E000
+#define CONFIG_SYS_GPCR3_VAL 0x01C1E000
+#define CONFIG_SYS_GPDR0_VAL 0xCFF90400
+#define CONFIG_SYS_GPDR1_VAL 0xFB22BFC1
+#define CONFIG_SYS_GPDR2_VAL 0x93CDFFDF
+#define CONFIG_SYS_GPDR3_VAL 0x0069FF81
+#define CONFIG_SYS_GPSR0_VAL 0x02000018
+#define CONFIG_SYS_GPSR1_VAL 0x00000000
+#define CONFIG_SYS_GPSR2_VAL 0x000C0000
+#define CONFIG_SYS_GPSR3_VAL 0x00080000
+
+#define CONFIG_SYS_PSSR_VAL 0x30
+
+/*
+ * Clock settings
+ */
+#define CONFIG_SYS_CKEN 0x01ffffff
+#define CONFIG_SYS_CCCR 0x02000210
+
+/*
+ * Memory settings
+ */
+#define CONFIG_SYS_MSC0_VAL 0x7ff844c8
+#define CONFIG_SYS_MSC1_VAL 0x7ff86ab4
+#define CONFIG_SYS_MSC2_VAL 0x7ff87ff8
+#define CONFIG_SYS_MDCNFG_VAL 0x0B880acd
+#define CONFIG_SYS_MDREFR_VAL 0x201fa031
+#define CONFIG_SYS_MDMRS_VAL 0x00320032
+#define CONFIG_SYS_FLYCNFG_VAL 0x00000000
+#define CONFIG_SYS_SXCNFG_VAL 0x40044004
+#define CONFIG_SYS_MECR_VAL 0x00000003
+#define CONFIG_SYS_MCMEM0_VAL 0x0001c391
+#define CONFIG_SYS_MCMEM1_VAL 0x0001c391
+#define CONFIG_SYS_MCATT0_VAL 0x0001c391
+#define CONFIG_SYS_MCATT1_VAL 0x0001c391
+#define CONFIG_SYS_MCIO0_VAL 0x00014611
+#define CONFIG_SYS_MCIO1_VAL 0x0001c391
+
+/*
+ * USB
+ */
+#define CONFIG_USB_DEVICE
+#define CONFIG_USB_TTY
+#define CONFIG_USB_DEV_PULLUP_GPIO 114
+
+/*
+ * SPL
+ */
+#define CONFIG_SPL
+#define CONFIG_SPL_TEXT_BASE 0xa1700000 /* IPL loads SPL here */
+#define CONFIG_SPL_STACK 0x5c040000 /* end of internal SRAM */
+#define CONFIG_SPL_NAND_SUPPORT /* build libnand for spl */
+#define CONFIG_SPL_NAND_DOCG4 /* use lean docg4 nand spl driver */
+#define CONFIG_SPL_LIBGENERIC_SUPPORT /* spl uses memcpy */
+
+/*
+ * NAND
+ */
+#define CONFIG_NAND_DOCG4
+#define CONFIG_SYS_NAND_SELF_INIT
+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* only one device */
+#define CONFIG_SYS_NAND_BASE 0x00000000 /* mapped to reset vector */
+#define CONFIG_SYS_NAND_PAGE_SIZE 0x200
+#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000
+#define CONFIG_BITREVERSE /* needed by docg4 driver */
+#define CONFIG_BCH /* needed by docg4 driver */
+
+/*
+ * IMPORTANT NOTE: this is the size of the concatenated spl + u-boot image. It
+ * will be rounded up to the next 64k boundary (the spl flash block size), so it
+ * does not have to be exact, but you must ensure that it is not less than the
+ * actual image size, or it may fail to boot (bricked phone)!
+ * (Tip: reduces to three blocks with lcd and mmc support removed from u-boot.)
+*/
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 /* four 64k flash blocks */
+
+/*
+ * This is the byte offset into the flash at which the concatenated spl + u-boot
+ * image is placed. It must be at the start of a block (256k boundary). Blocks
+ * 0 - 5 are write-protected, so we start at block 6.
+ */
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x180000 /* block 6 */
+
+/* DRAM address to which u-boot proper is loaded (before it relocates itself) */
+#define CONFIG_SYS_NAND_U_BOOT_DST 0xa0000000
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+/* passed to linker by Makefile as arg to -Ttext option */
+#define CONFIG_SYS_TEXT_BASE 0xa0000000
+
+#define CONFIG_SYS_INIT_SP_ADDR 0x5c040000 /* end of internal SRAM */
+
+/*
+ * environment
+ */
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_BUILD_ENVCRC
+#define CONFIG_ENV_SIZE 0x200
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "stdin=usbtty\0" \
+ "stdout=usbtty\0" \
+ "stderr=usbtty"
+#define CONFIG_BOOTARGS "mtdparts=Msys_Diskonchip_G4:1536k(protected_part)ro,1024k(bootloader_part),-(filesys_part) \
+ip=192.168.11.102:::255.255.255.0:treo:usb0"
+#define CONFIG_BOOTDELAY 3
+
+#if 0 /* example: try 2nd mmc partition, then nand */
+#define CONFIG_BOOTCOMMAND \
+ "mmc rescan; " \
+ "if mmcinfo && ext2load mmc 0:2 0xa1000000 uImage; then " \
+ "bootm 0xa1000000; " \
+ "elif nand read 0xa1000000 0x280000 0x240000; then " \
+ "bootm 0xa1000000; " \
+ "fi; "
+#endif
+
+/* u-boot lives at end of SDRAM, so use start of SDRAM for stand alone apps */
+#define CONFIG_STANDALONE_LOAD_ADDR 0xa0000000
+
+#define CONFIG_SYS_DCACHE_OFF
+#define CONFIG_SYS_ICACHE_OFF
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index 5e43066..0f04597 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -36,6 +36,7 @@
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_BOARD_EARLY_INIT_F
/* Mach Type */
#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
@@ -57,6 +58,7 @@
/* Handling Sleep Mode*/
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
+#define S5P_CHECK_LPA 0xABAD0000
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
@@ -93,6 +95,7 @@
/* MMC SPL */
#define CONFIG_SPL
+#define CONFIG_SKIP_LOWLEVEL_INIT
#define COPY_BL2_FNPTR_ADDR 0x00002488
#define CONFIG_SPL_TEXT_BASE 0x02021410
@@ -146,7 +149,10 @@
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
#define CONFIG_DOS_PARTITION 1
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
+#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
+
+#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
/* U-boot copy size from boot Media to DRAM.*/
#define COPY_BL2_SIZE 0x80000
diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h
index 721b29c..44e98e5 100644
--- a/include/configs/tegra114-common.h
+++ b/include/configs/tegra114-common.h
@@ -77,4 +77,7 @@
/* Total I2C ports on Tegra114 */
#define TEGRA_I2C_NUM_CONTROLLERS 5
+/* For USB EHCI controller */
+#define CONFIG_EHCI_IS_TDI
+
#endif /* _TEGRA114_COMMON_H_ */
diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h
index ed36e11..7ea36be 100644
--- a/include/configs/tegra30-common.h
+++ b/include/configs/tegra30-common.h
@@ -90,4 +90,7 @@
/* Total I2C ports on Tegra30 */
#define TEGRA_I2C_NUM_CONTROLLERS 5
+/* For USB EHCI controller */
+#define CONFIG_EHCI_IS_TDI
+
#endif /* _TEGRA30_COMMON_H_ */
diff --git a/include/configs/trats.h b/include/configs/trats.h
index c70838b..103295e 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -66,7 +66,7 @@
#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (16 << 20))
/* select serial console configuration */
#define CONFIG_SERIAL2 /* use SERIAL 2 */
diff --git a/include/configs/ventana.h b/include/configs/ventana.h
index 41a7176..05e682c 100644
--- a/include/configs/ventana.h
+++ b/include/configs/ventana.h
@@ -43,6 +43,7 @@
#define CONFIG_MACH_TYPE MACH_TYPE_VENTANA
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */
/* SD/MMC */
#define CONFIG_MMC
@@ -73,6 +74,14 @@
/* USB keyboard */
#define CONFIG_USB_KEYBOARD
+/* LCD support */
+#define CONFIG_LCD
+#define CONFIG_PWM_TEGRA
+#define CONFIG_VIDEO_TEGRA
+#define LCD_BPP LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_CONSOLE_SCROLL_LINES 10
+
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 77fe893..5012fc8 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -83,13 +83,101 @@
#define CONFIG_BOOTDELAY 3
+#define CONFIG_LOADADDR 0x82000000
#define CONFIG_SYS_TEXT_BASE 0x3f008000
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "uimage=uImage\0" \
+ "console=ttyLP1\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "fdt_file=vf610-twr.dtb\0" \
+ "fdt_addr=0x81000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
+ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
+ "update_sd_firmware_filename=u-boot.imx\0" \
+ "update_sd_firmware=" \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "if mmc dev ${mmcdev}; then " \
+ "if ${get_cmd} ${update_sd_firmware_filename}; then " \
+ "setexpr fw_sz ${filesize} / 0x200; " \
+ "setexpr fw_sz ${fw_sz} + 1; " \
+ "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
+ "fi; " \
+ "fi\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
+ "netargs=setenv bootargs console=${console},${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${uimage}; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loaduimage; then " \
+ "run mmcboot; " \
+ "else run netboot; " \
+ "fi; " \
+ "fi; " \
+ "else run netboot; fi"
+
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#define CONFIG_SYS_PROMPT "Vybrid U-Boot > "
+#define CONFIG_SYS_PROMPT "=> "
#undef CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE \
@@ -101,8 +189,7 @@
#define CONFIG_SYS_MEMTEST_START 0x80010000
#define CONFIG_SYS_MEMTEST_END 0x87C00000
-#define CONFIG_SYS_LOAD_ADDR 0x80010000
-
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_HZ 1000
/*
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 5593f1c..ee6bf21 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -103,6 +103,8 @@
#if defined(CONFIG_MX6DL)
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb"
+#elif defined(CONFIG_MX6Q)
+#define CONFIG_DEFAULT_FDT_FILE "imx6q-wandboard.dtb"
#elif defined(CONFIG_MX6S)
#define CONFIG_DEFAULT_FDT_FILE "imx6s-wandboard.dtb"
#endif
@@ -118,8 +120,8 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
- "mmcpart=2\0" \
- "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
+ "mmcpart=1\0" \
+ "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"update_sd_firmware_filename=u-boot.imx\0" \
"update_sd_firmware=" \
"if test ${ip_dyn} = yes; then " \
diff --git a/include/fdtdec.h b/include/fdtdec.h
index d93e102..bdefda4 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -64,6 +64,8 @@ struct fdt_memory {
enum fdt_compat_id {
COMPAT_UNKNOWN,
COMPAT_NVIDIA_TEGRA20_USB, /* Tegra20 USB port */
+ COMPAT_NVIDIA_TEGRA30_USB, /* Tegra30 USB port */
+ COMPAT_NVIDIA_TEGRA114_USB, /* Tegra114 USB port */
COMPAT_NVIDIA_TEGRA114_I2C, /* Tegra114 I2C w/single clock source */
COMPAT_NVIDIA_TEGRA20_I2C, /* Tegra20 i2c */
COMPAT_NVIDIA_TEGRA20_DVC, /* Tegra20 dvc (really just i2c) */
@@ -92,6 +94,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
+ COMPAT_SAMSUNG_EXYNOS_SERIAL, /* Exynos UART */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */
diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h
index fdc7ca9..1c374a9 100644
--- a/include/power/max77686_pmic.h
+++ b/include/power/max77686_pmic.h
@@ -157,6 +157,8 @@ enum {
/* Buck1 1 volt value */
#define MAX77686_BUCK1OUT_1V 0x5
+/* Buck1 1.05 volt value */
+#define MAX77686_BUCK1OUT_1_05V 0x6
#define MAX77686_BUCK1CTRL_EN (3 << 0)
/* Buck2 1.3 volt value */
#define MAX77686_BUCK2DVS1_1_3V 0x38