diff options
| author | Tom Rini <trini@konsulko.com> | 2015-09-24 12:28:06 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-09-24 12:28:06 -0400 |
| commit | d0f30211e9823694c1c2c79f471dbe9d498a40fd (patch) | |
| tree | b1bebced9f2d35ec37066cd382d2c46606199864 /include | |
| parent | 7bb839d672ed3b28c7740429df4a307482868c5b (diff) | |
| parent | aad604aef36e90bd42b4ce1969960f3427be4a7a (diff) | |
| download | u-boot-imx-d0f30211e9823694c1c2c79f471dbe9d498a40fd.zip u-boot-imx-d0f30211e9823694c1c2c79f471dbe9d498a40fd.tar.gz u-boot-imx-d0f30211e9823694c1c2c79f471dbe9d498a40fd.tar.bz2 | |
Merge git://git.denx.de/u-boot-socfpga
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/socfpga_arria5_socdk.h (renamed from include/configs/socfpga_arria5.h) | 4 | ||||
| -rw-r--r-- | include/configs/socfpga_common.h | 2 | ||||
| -rw-r--r-- | include/configs/socfpga_cyclone5_socdk.h (renamed from include/configs/socfpga_cyclone5.h) | 4 | ||||
| -rw-r--r-- | include/configs/socfpga_de0_nano_soc.h | 4 | ||||
| -rw-r--r-- | include/configs/socfpga_mcvevk.h | 6 | ||||
| -rw-r--r-- | include/configs/socfpga_sockit.h | 4 |
6 files changed, 22 insertions, 2 deletions
diff --git a/include/configs/socfpga_arria5.h b/include/configs/socfpga_arria5_socdk.h index 3193684..b75b0a2 100644 --- a/include/configs/socfpga_arria5.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -59,6 +59,10 @@ #endif +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ +#define CONFIG_ENV_OFFSET 512 /* just after the MBR */ + /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 38ae763..cece095 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -73,7 +73,6 @@ /* * Cache */ -#define CONFIG_SYS_ARM_CACHE_WRITEALLOC #define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS @@ -282,7 +281,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_CONSOLE_IS_IN_ENV #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_SYS_CONSOLE_ENV_OVERWRITE -#define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_SIZE 4096 /* diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5_socdk.h index 9e733e5..fa67b25 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -59,6 +59,10 @@ #endif +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ +#define CONFIG_ENV_OFFSET 512 /* just after the MBR */ + /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index 2508d03..191e1f7 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -55,6 +55,10 @@ #endif +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ +#define CONFIG_ENV_OFFSET 512 /* just after the MBR */ + /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index c5b4b4c..65816a0 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -43,6 +43,12 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +/* Environment is in MMC */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ +#define CONFIG_ENV_OFFSET 512 /* just after the MBR */ + /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index 747e988..6c71ef4 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -59,6 +59,10 @@ #endif +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ +#define CONFIG_ENV_OFFSET 512 /* just after the MBR */ + /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS |