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author | Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com> | 2018-06-12 17:02:23 +0200 |
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committer | Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com> | 2018-06-12 17:02:23 +0200 |
commit | c43b4032b44fde06748744a0318d67c5662f7b48 (patch) | |
tree | 1cc2c987ad8e4ce99493db5122434a274d9b097c /include | |
parent | 576e625ef6cc7ea569bb91966e345ebd01824a32 (diff) | |
download | u-boot-imx-c43b4032b44fde06748744a0318d67c5662f7b48.zip u-boot-imx-c43b4032b44fde06748744a0318d67c5662f7b48.tar.gz u-boot-imx-c43b4032b44fde06748744a0318d67c5662f7b48.tar.bz2 |
IGEP0146: Initial commit
Structure folders
defconfig
initial ram config
only UART will be configured for basic printf
Signed-off-by: Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/igep0146.h | 126 |
1 files changed, 126 insertions, 0 deletions
diff --git a/include/configs/igep0146.h b/include/configs/igep0146.h new file mode 100644 index 0000000..15f1718 --- /dev/null +++ b/include/configs/igep0146.h @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2016 ISEE 2007 SL - http://www.isee.biz + * + * Header file for IGEP0046 board + * + * Author: Jose Miguel Sanchez Sanabria <jsanabria@iseebcn.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_IGEP0046_H +#define __CONFIG_IGEP0046_H + +#include "mx6_common.h" + + +#define CONFIG_SECURE_BOOT +#ifdef CONFIG_SECURE_BOOT +#ifndef CONFIG_CSF_SIZE +#define CONFIG_CSF_SIZE 0x4000 +#endif +#endif + +#define CONFIG_SYS_FSL_SEC_COMPAT 4 /* HAB version */ +#define CONFIG_FSL_CAAM +#define CONFIG_SYS_FSL_SEC_LE + +/* Falcon Mode */ +#ifdef CONFIG_SPL +#include "imx6_spl.h" + +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +#define CONFIG_CMD_SPL +#define CONFIG_SPL_BOARD_INIT + +#define CONFIG_SYS_SPL_ARGS_ADDR 0x88000000 +#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) + +/* Falcon Mode - RAW MMC support: args@1MB kernel@2MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ +#endif + +/* CPU */ +#define CONFIG_IMX_THERMAL + +/* GPIO */ +#define CONFIG_MXC_GPIO + +/* UART Configs */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART3_BASE +#define CONSOLE_DEV "ttymxc1" +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) + +/* Physical Memory Map */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Begin and End Address of simple memory test */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) +#define CONFIG_SYS_MEMTEST_SCRATCH 0x80800000 + + +/* Miscellaneous configurable options */ +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "Press ESC to abort autoboot in %d seconds\n" +#define CONFIG_AUTOBOOT_STOP_STR "\x1b" +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE (128 * 1024) + +/* MMC Configs */ +#define CONFIG_MMCROOT "/dev/mmcblk0p2" +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_DOS_PARTITION + +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_FAT_WRITE + + +/* NET Configs */ +#define CONFIG_ENV_OVERWRITE /* To allow write MAC into ethaddr variable */ + +/* Environment */ +#define CONFIG_ENV_SIZE (128 * 1024) +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 + +/* Commands */ +#undef CONFIG_CMD_IMLS +#define EMMC_ENV "" +#define VIDEO_ARGS "" +#define VIDEO_ARGS_SCRIPT "" + + +#endif /* __IGEP0046_CONFIG_H */ + + + + + + + |