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authorSimon Glass <sjg@chromium.org>2011-11-05 04:46:47 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-24 10:23:31 +0100
commitbf80088ac0f0a753f986d663dbf24327680e4533 (patch)
treeaa9e0239ddb668a5a95305e33a0dbad368906121 /include
parent9112ef8d89e3e496ba6f73276f17dd5c2b93877f (diff)
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tegra2: config: Enable SPI flash on Seaboard
The Seaboard includes a Winbond 4MB flash part. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/seaboard.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index 7d29144..7e8c8cc 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -37,11 +37,22 @@
#define CONFIG_TEGRA2_ENABLE_UARTD
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
+/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
+#define CONFIG_UART_DISABLE_GPIO GPIO_PI3
+
#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
#define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */
#define CONFIG_BOARD_EARLY_INIT_F
+/* SPI */
+#define CONFIG_TEGRA2_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+
/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC