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authorTerry Lv <r65388@freescale.com>2010-02-06 18:19:39 +0800
committerTerry Lv <r65388@freescale.com>2010-02-08 13:49:02 +0800
commit8bab684efeed6ae55e43df47298578c31b251af3 (patch)
tree744f0db7f90428e1625dac79243c91dbcd9b1dd8 /include
parent3de15e03d89eeda18e665d270c6e3abf65c94d1d (diff)
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ENGR00120830: Add eMMC and eSD fast boot support
Add eMMC and eSD fast boot support. Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Brian Liu <b14843@freescale.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/mx51_bbg.h33
-rw-r--r--include/mmc.h26
2 files changed, 27 insertions, 32 deletions
diff --git a/include/configs/mx51_bbg.h b/include/configs/mx51_bbg.h
index f773563..b2961a2 100644
--- a/include/configs/mx51_bbg.h
+++ b/include/configs/mx51_bbg.h
@@ -69,36 +69,6 @@
#define CONFIG_MX51_UART 1
#define CONFIG_MX51_UART1 1
-/*
- * SPI Configs
- * */
-#define CONFIG_FSL_SF 1
-#define CONFIG_SPI_FLASH_IMX_ATMEL 1
-#define CONFIG_SPI_FLASH_CS 1
-#define CONFIG_IMX_ECSPI
-#define CONFIG_IMX_SPI_PMIC
-#define CONFIG_IMX_SPI_PMIC_CS 0
-#define IMX_CSPI_VER_2_3 1
-#define MAX_SPI_BYTES (64 * 4)
-
-/*
- * MMC Configs
- * */
-
-/*
- * Eth Configs
- */
-#define CONFIG_HAS_ETH1
-#define CONFIG_NET_MULTI 1
-#define CONFIG_MXC_FEC
-#define CONFIG_MII
-#define CONFIG_DISCOVER_PHY
-
-#define CONFIG_FEC0_IOBASE FEC_BASE_ADDR
-#define CONFIG_FEC0_PINMUX -1
-#define CONFIG_FEC0_PHY_ADDR 0x1F
-#define CONFIG_FEC0_MIIBASE -1
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
@@ -133,7 +103,8 @@
#define CONFIG_FSL_SF 1
#define CONFIG_SPI_FLASH_IMX_ATMEL 1
#define CONFIG_SPI_FLASH_CS 1
- #define CONFIG_IMX_SPI
+ #define CONFIG_IMX_ECSPI
+ #define IMX_CSPI_VER_2_3 1
#define CONFIG_IMX_SPI_PMIC
#define CONFIG_IMX_SPI_PMIC_CS 0
diff --git a/include/mmc.h b/include/mmc.h
index 2dc69ab..fe63ed7 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -1,5 +1,7 @@
/*
- * Copyright 2008, Freescale Semiconductor, Inc
+ * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * Copyright 2008-2010, Freescale Semiconductor, Inc
* Andy Fleming
*
* Based (loosely) on the Linux code
@@ -79,6 +81,7 @@
#define SD_CMD_SEND_RELATIVE_ADDR 3
#define SD_CMD_SWITCH_FUNC 6
#define SD_CMD_SEND_IF_COND 8
+#define SD_CMD_SELECT_PARTITION 43
#define SD_CMD_APP_SET_BUS_WIDTH 6
#define SD_CMD_APP_SEND_OP_COND 41
@@ -128,11 +131,13 @@
* EXT_CSD fields
*/
+#define EXT_CSD_BOOT_CONFIG 179 /* RW */
#define EXT_CSD_BUS_WIDTH 183 /* R/W */
#define EXT_CSD_HS_TIMING 185 /* R/W */
#define EXT_CSD_CARD_TYPE 196 /* RO */
#define EXT_CSD_REV 192 /* RO */
#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
+#define EXT_CSD_BOOT_INFO 228 /* RO */
/*
* EXT_CSD field definitions
@@ -149,6 +154,17 @@
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
+#define EXT_CSD_BOOT_PARTITION_ENABLE_MASK (0x7 << 3)
+#define EXT_CSD_BOOT_PARTITION_DISABLE (0x0)
+#define EXT_CSD_BOOT_PARTITION_PART1 (0x1 << 3)
+#define EXT_CSD_BOOT_PARTITION_PART2 (0x2 << 3)
+#define EXT_CSD_BOOT_PARTITION_USER (0x7 << 3)
+
+#define EXT_CSD_BOOT_PARTITION_ACCESS_MASK (0x7)
+#define EXT_CSD_BOOT_PARTITION_ACCESS_DISABLE (0x0)
+#define EXT_CSD_BOOT_PARTITION_ACCESS_PART1 (0x1)
+#define EXT_CSD_BOOT_PARTITION_ACCESS_PART2 (0x2)
+
#define R1_ILLEGAL_COMMAND (1 << 22)
#define R1_APP_CMD (1 << 5)
@@ -259,6 +275,10 @@ struct mmc {
uint read_bl_len;
uint write_bl_len;
u64 capacity;
+#ifdef CONFIG_BOOT_PARTITION_ACCESS
+ uint boot_config;
+ uint boot_size_mult;
+#endif
block_dev_desc_t block_dev;
int (*send_cmd)(struct mmc *mmc,
struct mmc_cmd *cmd, struct mmc_data *data);
@@ -272,6 +292,10 @@ int mmc_init(struct mmc *mmc);
int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
struct mmc *find_mmc_device(int dev_num);
void print_mmc_devices(char separator);
+#ifdef CONFIG_BOOT_PARTITION_ACCESS
+int mmc_switch_partition(struct mmc *mmc, uint part);
+int sd_switch_partition(struct mmc *mmc, uint part);
+#endif
#ifndef CONFIG_GENERIC_MMC
int mmc_legacy_init(int verbose);