Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx

3 files changed, 95 insertions, 0 deletions

diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h
index 5f74afb..f516c46 100644
--- a/include/configs/ads5121.h
+++ b/include/configs/ads5121.h
@@ -210,6 +210,7 @@
 
 #define CFG_CS0_CFG		0x05059310	/* ALE active low, data size 4bytes */
 #define CFG_CS2_CFG		0x05059010	/* ALE active low, data size 1byte */
+#define CFG_CS_ALETIMING	0x00000005	/* Use alternative CS timing for CS0 and CS2 */
 
 /* Use SRAM for initial stack */
 #define CFG_INIT_RAM_ADDR	CFG_SRAM_BASE		/* Initial RAM address */
diff --git a/include/mpc512x.h b/include/mpc512x.h
index a76b1ca..cb418d1 100644
--- a/include/mpc512x.h
+++ b/include/mpc512x.h
@@ -58,6 +58,7 @@
 #define CS5_CONFIG		0x00014
 #define CS6_CONFIG		0x00018
 #define CS7_CONFIG		0x0001C
+#define CS_ALE_TIMING_CONFIG	0x00034
 
 #define CS_CTRL			0x00020
 #define CS_CTRL_ME		0x01000000	/* CS Master Enable bit */
diff --git a/include/mpc5xxx_sdma.h b/include/mpc5xxx_sdma.h
new file mode 100644
index 0000000..8b740e4
--- /dev/null
+++ b/include/mpc5xxx_sdma.h
@@ -0,0 +1,93 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * This file is based on code
+ * (C) Copyright Motorola, Inc., 2000
+ *
+ * odin smartdma header file
+ */
+
+#ifndef __MPC5XXX_SDMA_H
+#define __MPC5XXX_SDMA_H
+
+#include <common.h>
+#include <mpc5xxx.h>
+
+/* Task number assignment */
+#define FEC_RECV_TASK_NO            0
+#define FEC_XMIT_TASK_NO            1
+
+/*---------------------------------------------------------------------*/
+
+/* Stuff for Ethernet Tx/Rx tasks                                      */
+
+/*---------------------------------------------------------------------*/
+
+/* Layout of Ethernet controller Parameter SRAM area:
+----------------------------------------------------------------
+0x00: TBD_BASE, base address of TX BD ring
+0x04: TBD_NEXT, address of next TX BD to be processed
+0x08: RBD_BASE, base address of RX BD ring
+0x0C: RBD_NEXT, address of next RX BD to be processed
+---------------------------------------------------------------
+ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH).
+*/
+
+/* base address of SRAM area to store parameters used by Ethernet tasks */
+#define FEC_PARAM_BASE		(MPC5XXX_SRAM + 0x0800)
+
+/* base address of SRAM area for buffer descriptors */
+#define FEC_BD_BASE		(MPC5XXX_SRAM + 0x0820)
+
+/*---------------------------------------------------------------------*/
+
+/* common shortcuts  used  by driver C code                            */
+
+/*---------------------------------------------------------------------*/
+
+/* Disable SmartDMA task */
+#define SDMA_TASK_DISABLE(tasknum)                     \
+{                                                      \
+    volatile ushort *tcr = (ushort *)(MPC5XXX_SDMA + 0x0000001c + 2 * tasknum); \
+    *tcr = (*tcr) & (~0x8000);                         \
+}
+
+/* Enable SmartDMA task */
+#define SDMA_TASK_ENABLE(tasknum)                      \
+{                                                      \
+    volatile ushort *tcr = (ushort *) (MPC5XXX_SDMA + 0x0000001c + 2 * tasknum); \
+    *tcr = (*tcr)  | 0x8000;                           \
+}
+
+/* Enable interrupt */
+#define SDMA_INT_ENABLE(tasknum)                       \
+{                                                      \
+    struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
+    sdma->IntMask &= ~(1 << tasknum);                  \
+}
+
+/* Disable interrupt */
+#define SDMA_INT_DISABLE(tasknum)   \
+{                                                      \
+    struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
+    sdma->IntMask |= (1 << tasknum);                   \
+}
+
+
+/* Clear interrupt pending bits */
+#define SDMA_CLEAR_IEVENT(tasknum)  \
+{                                                      \
+    struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA; \
+    sdma->IntPend = (1 << tasknum);                    \
+}
+
+/* get interupt pending bit of a task */
+#define SDMA_GET_PENDINGBIT(tasknum)                   \
+	((*(vu_long *)(MPC5XXX_SDMA + 0x14)) & (1<<(tasknum)))
+
+/* get interupt mask bit of a task */
+#define SDMA_GET_MASKBIT(tasknum)                      \
+	((*(vu_long *)(MPC5XXX_SDMA + 0x18)) & (1<<(tasknum)))
+
+#endif	/* __MPC5XXX_SDMA_H */