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authorTom Rini <trini@konsulko.com>2016-04-13 07:19:50 -0400
committerTom Rini <trini@konsulko.com>2016-04-13 07:19:50 -0400
commit814013253fd4cf932d0fb32f7043f09a2a748d9a (patch)
tree9d9f84d8b469beb5e8aade98c503db4ce51bb8d8 /include
parent39fbd987164336adc2ff7e5ab7a4268b8dcdee92 (diff)
parent59c9e9b408014025cfa158a98aeafbcf33aa2d3d (diff)
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Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'include')
-rw-r--r--include/configs/ge_bx50v3.h349
-rw-r--r--include/configs/m53evk.h1
-rw-r--r--include/configs/mx28evk.h3
-rw-r--r--include/configs/mx6sabre_common.h2
-rw-r--r--include/configs/mx7_common.h10
-rw-r--r--include/configs/mx7dsabresd.h8
-rw-r--r--include/configs/warp7.h155
-rw-r--r--include/configs/xpress.h166
8 files changed, 683 insertions, 11 deletions
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
new file mode 100644
index 0000000..6fa4a9a
--- /dev/null
+++ b/include/configs/ge_bx50v3.h
@@ -0,0 +1,349 @@
+/*
+ * Copyright (C) 2015 Timesys Corporation
+ * Copyright (C) 2015 General Electric Company
+ * Copyright (C) 2014 Advantech
+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the GE MX6Q Bx50v3 boards.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __GE_BX50V3_CONFIG_H
+#define __GE_BX50V3_CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+
+#if defined(CONFIG_TARGET_GE_B450V3)
+#define CONFIG_BOARD_NAME "General Electric B450v3"
+#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b450v3.dtb"
+#elif defined(CONFIG_TARGET_GE_B650V3)
+#define CONFIG_BOARD_NAME "General Electric B650v3"
+#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b650v3.dtb"
+#elif defined(CONFIG_TARGET_GE_B850V3)
+#define CONFIG_BOARD_NAME "General Electric B850v3"
+#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b850v3.dtb"
+#else
+#define CONFIG_BOARD_NAME "General Electric BA16 Generic"
+#define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-ba16.dtb"
+#endif
+
+#define CONFIG_MXC_UART_BASE UART3_BASE
+#define CONFIG_CONSOLE_DEV "ttymxc2"
+
+#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
+
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+#define CONFIG_BOOTDELAY 1
+
+#include "mx6_common.h"
+#include <linux/sizes.h>
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+
+#define CONFIG_MXC_GPIO
+#define CONFIG_MXC_UART
+
+#define CONFIG_CMD_FUSE
+#define CONFIG_MXC_OCOTP
+
+/* SATA Configs */
+#define CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_DWC_AHSATA_PORT_ID 0
+#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+
+/* MMC Configs */
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_KEYBOARD
+#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
+
+#define CONFIG_CI_UDC
+#define CONFIG_USBD_HS
+#define CONFIG_USB_GADGET_DUALSPEED
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_GADGET_MASS_STORAGE
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_G_DNL_VENDOR_NUM 0x0525
+#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
+#define CONFIG_G_DNL_MANUFACTURER "Advantech"
+
+/* Networking Configs */
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define CONFIG_ETHPRIME "FEC"
+#define CONFIG_FEC_MXC_PHYADDR 4
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ATHEROS
+
+/* Serial Flash */
+#define CONFIG_CMD_SF
+#ifdef CONFIG_CMD_SF
+#define CONFIG_MXC_SPI
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#endif
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 115200
+
+/* Command definition */
+#define CONFIG_CMD_BMODE
+#define CONFIG_CMD_BOOTZ
+#undef CONFIG_CMD_IMLS
+
+#define CONFIG_LOADADDR 0x12000000
+#define CONFIG_SYS_TEXT_BASE 0x17800000
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "image=/boot/uImage\0" \
+ "uboot=u-boot.imx\0" \
+ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "fdt_addr=0x18000000\0" \
+ "boot_fdt=yes\0" \
+ "ip_dyn=yes\0" \
+ "console=" CONFIG_CONSOLE_DEV "\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "sddev=0\0" \
+ "emmcdev=1\0" \
+ "partnum=1\0" \
+ "update_sd_firmware=" \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "if mmc dev ${mmcdev}; then " \
+ "if ${get_cmd} ${update_sd_firmware_filename}; then " \
+ "setexpr fw_sz ${filesize} / 0x200; " \
+ "setexpr fw_sz ${fw_sz} + 1; " \
+ "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
+ "fi; " \
+ "fi\0" \
+ "update_sf_uboot=" \
+ "if tftp $loadaddr $uboot; then " \
+ "sf probe; " \
+ "sf erase 0 0xC0000; " \
+ "sf write $loadaddr 0x400 $filesize; " \
+ "echo 'U-Boot upgraded. Please reset'; " \
+ "fi\0" \
+ "setargs=setenv bootargs console=${console},${baudrate} " \
+ "root=/dev/${rootdev} rw rootwait cma=128M\0" \
+ "loadbootscript=" \
+ "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
+ " source\0" \
+ "loadimage=" \
+ "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
+ "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
+ "tryboot=" \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loadimage; then " \
+ "run doboot; " \
+ "fi; " \
+ "fi;\0" \
+ "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
+ "run setargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
+ "netargs=setenv bootargs console=${console},${baudrate} " \
+ "root=/dev/nfs " \
+ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+ "netboot=echo Booting from net ...; " \
+ "run netargs; " \
+ "if test ${ip_dyn} = yes; then " \
+ "setenv get_cmd dhcp; " \
+ "else " \
+ "setenv get_cmd tftp; " \
+ "fi; " \
+ "${get_cmd} ${image}; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+ "bootm ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootm; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootm; " \
+ "fi;\0" \
+
+#define CONFIG_BOOTCOMMAND \
+ "usb start; " \
+ "setenv dev usb; " \
+ "setenv devnum 0; " \
+ "setenv rootdev sda1; " \
+ "run tryboot; " \
+ \
+ "setenv dev mmc; " \
+ "setenv rootdev mmcblk0p1; " \
+ \
+ "setenv devnum ${sddev}; " \
+ "if mmc dev ${devnum}; then " \
+ "run tryboot; " \
+ "setenv rootdev mmcblk1p1; " \
+ "fi; " \
+ \
+ "setenv devnum ${emmcdev}; " \
+ "if mmc dev ${devnum}; then " \
+ "run tryboot; " \
+ "fi; " \
+ \
+ "bmode usb; " \
+
+#define CONFIG_ARP_TIMEOUT 200UL
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_AUTO_COMPLETE
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START 0x10000000
+#define CONFIG_SYS_MEMTEST_END 0x10010000
+#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_STACKSIZE (128 * 1024)
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_OFFSET (768 * 1024)
+#define CONFIG_ENV_SECT_SIZE (64 * 1024)
+#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+
+#define CONFIG_OF_LIBFDT
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+#define CONFIG_CMD_CACHE
+#endif
+
+#define CONFIG_SYS_FSL_USDHC_NUM 3
+
+/* Framebuffer */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_IMX_HDMI
+#define CONFIG_IMX_VIDEO_SKIP
+
+#undef CONFIG_CMD_PCI
+#ifdef CONFIG_CMD_PCI
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_PCIE_IMX
+#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
+#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
+#endif
+
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_I2C_MXC_I2C1
+#define CONFIG_SYS_I2C_MXC_I2C2
+#define CONFIG_SYS_I2C_MXC_I2C3
+
+#endif /* __GE_BX50V3_CONFIG_H */
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 1efe48c..dc85768 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -41,6 +41,7 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SATA
#define CONFIG_CMD_USB
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index a52c8c9..4d86c13 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -23,7 +23,10 @@
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_PING
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index ceea74e..3e1b760 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -209,7 +209,7 @@
#define CONFIG_ENV_IS_IN_MMC
#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_ENV_OFFSET (8 * 64 * 1024)
+#define CONFIG_ENV_OFFSET (768 * 1024)
#endif
/* Framebuffer */
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index a627456..9bd6114 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -27,19 +27,10 @@
/* Enable iomux-lpsr support */
#define CONFIG_IOMUX_LPSR
-#define CONFIG_IMX_FIXED_IVT_OFFSET
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
-
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_BOARD_LATE_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_FSL_CLK
-
#define CONFIG_LOADADDR 0x80800000
#define CONFIG_SYS_TEXT_BASE 0x87800000
@@ -79,7 +70,6 @@
/* UART */
#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* MMC */
#define CONFIG_MMC
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 5d897c2..da1d26f 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -14,6 +14,14 @@
#define CONFIG_DBG_MONITOR
#define PHYS_SDRAM_SIZE SZ_1G
+#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+
/* Uncomment to enable secure boot support */
/* #define CONFIG_SECURE_BOOT */
#define CONFIG_CSF_SIZE 0x4000
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
new file mode 100644
index 0000000..d1404b2
--- /dev/null
+++ b/include/configs/warp7.h
@@ -0,0 +1,155 @@
+/*
+ * Copyright (C) 2016 NXP Semiconductors
+ *
+ * Configuration settings for the i.MX7S Warp board.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __WARP7_CONFIG_H
+#define __WARP7_CONFIG_H
+
+#define CONFIG_BOOTDELAY 1
+#include "mx7_common.h"
+
+#define PHYS_SDRAM_SIZE SZ_512M
+
+#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
+
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+/* MMC Config*/
+#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
+#define CONFIG_SUPPORT_EMMC_BOOT
+#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
+#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
+
+#define CONFIG_DFU_ENV_SETTINGS \
+ "dfu_alt_info=image raw 0 0x800000;"\
+ "u-boot raw 0 0x4000;"\
+ "bootimg part 0 1;"\
+ "rootfs part 0 2\0" \
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_DFU_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "image=zImage\0" \
+ "console=ttymxc0\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "fdt_file=imx7d-warp.dtb\0" \
+ "fdt_addr=0x83000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
+ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootz ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootz; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootz; " \
+ "fi;\0" \
+
+#define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev};" \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "if run loadbootscript; then " \
+ "run bootscript; " \
+ "else " \
+ "if run loadimage; then " \
+ "run mmcboot; " \
+ "fi; " \
+ "fi; " \
+ "fi"
+
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START 0x80000000
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_STACKSIZE SZ_128K
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_SIZE SZ_8K
+#define CONFIG_ENV_IS_IN_MMC
+
+#define CONFIG_ENV_OFFSET (8 * SZ_64K)
+#define CONFIG_SYS_FSL_USDHC_NUM 1
+
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_SYS_MMC_ENV_PART 0
+#define CONFIG_MMCROOT "/dev/mmcblk2p2"
+
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX7
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
+
+#define CONFIG_IMX_THERMAL
+
+#define CONFIG_CI_UDC
+#define CONFIG_USBD_HS
+#define CONFIG_USB_GADGET_DUALSPEED
+
+#define CONFIG_USB_GADGET
+#define CONFIG_CMD_USB_MASS_STORAGE
+#define CONFIG_USB_FUNCTION_MASS_STORAGE
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+
+#define CONFIG_G_DNL_VENDOR_NUM 0x0525
+#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
+#define CONFIG_G_DNL_MANUFACTURER "FSL"
+
+/* USB Device Firmware Update support */
+#define CONFIG_CMD_DFU
+#define CONFIG_USB_FUNCTION_DFU
+#define CONFIG_DFU_MMC
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
+#define DFU_DEFAULT_POLL_TIMEOUT 300
+
+#endif
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
new file mode 100644
index 0000000..9bc536b
--- /dev/null
+++ b/include/configs/xpress.h
@@ -0,0 +1,166 @@
+/*
+ * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
+ *
+ * Configuration settings for the CCV xPress board
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#ifndef __XPRESS_CONFIG_H
+#define __XPRESS_CONFIG_H
+
+#include "mx6_common.h"
+#include <asm/imx-common/gpio.h>
+
+/* SPL options */
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#include "imx6_spl.h"
+
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (16 << 20)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART1_BASE
+
+/* MMC Configs */
+#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
+
+/* I2C configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
+#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
+#define CONFIG_SYS_I2C_SPEED 100000
+
+/* Miscellaneous configurable options */
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START 0x80000000
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000)
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_HZ 1000
+
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+#define CONFIG_CMDLINE_EDITING
+
+/* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_SIZE (128 << 20)
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+/* Environment is in stored in the eMMC boot partition */
+#define CONFIG_ENV_SIZE (16 << 10)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_OFFSET (512 << 10)
+#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
+#define CONFIG_SYS_MMC_ENV_PART 1 /* boot parition */
+#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC2 */
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_BMODE
+#define CONFIG_CMD_CACHE
+
+/* USB Configs */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define CONFIG_CMD_MII
+#define CONFIG_FEC_ENET_DEV 0
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_FEC_MXC_PHYADDR 0x0
+#define CONFIG_FEC_XCV_TYPE RMII
+#define CONFIG_ETHPRIME "FEC"
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_SMSC
+
+#define CONFIG_IMX_THERMAL
+
+#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
+
+#define CONFIG_UBOOT_SECTOR_START 0x2
+#define CONFIG_UBOOT_SECTOR_COUNT 0x3fe
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "script=boot.scr\0" \
+ "image=zImage\0" \
+ "console=ttymxc0\0" \
+ "fdt_high=0xffffffff\0" \
+ "initrd_high=0xffffffff\0" \
+ "fdt_file=undefined\0" \
+ "fdt_addr=0x83000000\0" \
+ "boot_fdt=try\0" \
+ "ip_dyn=yes\0" \
+ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+ "mmcautodetect=yes\0" \
+ "mmcargs=setenv bootargs console=${console},${baudrate} " \
+ "root=${mmcroot}\0" \
+ "loadbootscript=" \
+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+ "bootscript=echo Running bootscript from mmc ...; " \
+ "source\0" \
+ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+ "if run loadfdt; then " \
+ "bootz ${loadaddr} - ${fdt_addr}; " \
+ "else " \
+ "if test ${boot_fdt} = try; then " \
+ "bootz; " \
+ "else " \
+ "echo WARN: Cannot load the DT; " \
+ "fi; " \
+ "fi; " \
+ "else " \
+ "bootz; " \
+ "fi;\0" \
+ "uboot=ccv/u-boot.imx\0" \
+ "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \
+ "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \
+ "update_uboot=if tftp ${uboot}; then " \
+ "if itest ${filesize} > 0; then " \
+ "mmc dev 0 1;" \
+ "setexpr blkc ${filesize} / 0x200;" \
+ "setexpr blkc ${blkc} + 1;" \
+ "if itest ${blkc} <= ${uboot_size}; then " \
+ "mmc write ${loadaddr} ${uboot_start} " \
+ "${blkc};" \
+ "fi;" \
+ "fi; fi;" \
+ "setenv filesize; setenv blkc\0" \
+ "update_bootpart=mmc bootbus 0 2 1 2;mmc partconf 0 1 1 0\0"
+
+#endif /* __XPRESS_CONFIG_H */