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authorShaohui Xie <Shaohui.Xie@nxp.com>2016-04-29 22:07:21 +0800
committerYork Sun <york.sun@nxp.com>2016-05-18 08:51:47 -0700
commit7942550a146f3eaf00add0e13442946365cc9775 (patch)
tree55bd8a4a7199a7cf3401c4a4ef488a722d061c2c /include
parent76394c9c9139b82e21a6e52da0e7341a3374f4be (diff)
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armv8: ls1043ardb: invert irq pin polarity for AQR105 PHY
To use AQR105 PHY's interrupt, we need to invert the IRQ pin polarity by setting relative bit in SCFG_INTPCR register, because AQR105 interrupt is low active but GIC accepts high active. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/ls1043ardb.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 6d35be2..39687cf 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -253,6 +253,7 @@
#define CONFIG_PHY_VITESSE
#define CONFIG_PHY_REALTEK
#define CONFIG_PHY_AQUANTIA
+#define AQR105_IRQ_MASK 0x40000000
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2