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authorAnatolij Gustschin <agust@denx.de>2011-10-29 05:12:25 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-11-04 22:06:37 +0100
commit6ac1c9033a15eee0706a02a649e4180634c2d4d7 (patch)
tree7fbd87280377b6465ab0f163b77412ea76ce3758 /include
parente99be769078dc8391202be8d63d2d8f7545bea2f (diff)
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imx: imx31_phycore.h: fix checkpatch warnings
Cleanup board config file and fix issues reported by checkpatch.pl script. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'include')
-rw-r--r--include/configs/imx31_phycore.h153
1 files changed, 84 insertions, 69 deletions
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index f4bfee4..1b75197 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -30,25 +30,18 @@
#include <asm/arch/imx-regs.h>
- /* High Level Configuration Options */
-#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
-#define CONFIG_MX31 1 /* in a mx31 */
+/* High Level Configuration Options */
+#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
+#define CONFIG_MX31 /* in a mx31 */
#define CONFIG_MX31_HCLK_FREQ 26000000
#define CONFIG_MX31_CLK32 32000
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-/* Temporarily disabled */
-#if 0
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_FIT 1
-#define CONFIG_FIT_VERBOSE 1
-#endif
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
/*
* Size of malloc() pool
@@ -59,14 +52,14 @@
* Hardware drivers
*/
-#define CONFIG_HARD_I2C 1
-#define CONFIG_I2C_MXC 1
-#define CONFIG_SYS_I2C_MX31_PORT2 1
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+#define CONFIG_SYS_I2C_MX31_PORT2
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0xfe
-#define CONFIG_MXC_UART 1
-#define CONFIG_SYS_MX31_UART1 1
+#define CONFIG_MXC_UART
+#define CONFIG_SYS_MX31_UART1
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -86,42 +79,60 @@
#define CONFIG_BOOTDELAY 3
-#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
+#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \
+ "1536k(kernel),-(root)"
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.23.168
#define CONFIG_SERVERIP 192.168.23.2
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
- "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
- "bootargs_flash=setenv bootargs $(bootargs) root=/dev/mtdblock2 rootfstype=jffs2" \
- "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)" \
- "bootcmd=run bootcmd_net\0" \
- "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 $(uimage); bootm\0" \
- "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; bootm 0x80000000\0" \
- "unlock=yes\0" \
- "mtdparts=" MTDPARTS_DEFAULT "\0" \
- "prg_uboot=tftpboot 0x80000000 $(uboot); protect off 0xa0000000 +0x20000; erase 0xa0000000 +0x20000; cp.b 0x80000000 0xa0000000 $(filesize)\0" \
- "prg_kernel=tftpboot 0x80000000 $(uimage); erase 0xa0040000 +0x180000; cp.b 0x80000000 0xa0040000 $(filesize)\0" \
- "prg_jffs2=tftpboot 0x80000000 $(jffs2); erase 0xa01c0000 0xa1ffffff; cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
- "videomode=video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:1241513985,vmode:0\0"
-
-
-#define CONFIG_SMC911X 1
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
+ "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
+ "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
+ "bootargs_flash=setenv bootargs $(bootargs) " \
+ "root=/dev/mtdblock2 rootfstype=jffs2\0" \
+ "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
+ "bootcmd=run bootcmd_net\0" \
+ "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \
+ "tftpboot 0x80000000 $(uimage);bootm\0" \
+ "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \
+ "bootm 0x80000000\0" \
+ "unlock=yes\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "prg_uboot=tftpboot 0x80000000 $(uboot);" \
+ "protect off 0xa0000000 +0x20000;" \
+ "erase 0xa0000000 +0x20000;" \
+ "cp.b 0x80000000 0xa0000000 $(filesize)\0" \
+ "prg_kernel=tftpboot 0x80000000 $(uimage);" \
+ "erase 0xa0040000 +0x180000;" \
+ "cp.b 0x80000000 0xa0040000 $(filesize)\0" \
+ "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \
+ "erase 0xa01c0000 0xa1ffffff;" \
+ "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
+ "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \
+ "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \
+ "sync:1241513985,vmode:0\0"
+
+
+#define CONFIG_SMC911X
#define CONFIG_SMC911X_BASE 0xa8000000
-#define CONFIG_SMC911X_32_BIT 1
+#define CONFIG_SMC911X_32_BIT
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_PROMPT "uboot> "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 256
/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS 16
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x10000
@@ -130,21 +141,21 @@
#define CONFIG_SYS_HZ 1000
-#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_CMDLINE_EDITING
-/*-----------------------------------------------------------------------
+/*
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
-/*-----------------------------------------------------------------------
+/*
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM_1 0x80000000
-#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM_1 0x80000000
+#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_TEXT_BASE 0xA0000000
@@ -156,33 +167,37 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_GBL_DATA_OFFSET)
-/*-----------------------------------------------------------------------
+/*
* FLASH and environment organization
*/
#define CONFIG_SYS_FLASH_BASE 0xa0000000
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max number of sectors on one chip */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
-
-#define CONFIG_ENV_IS_IN_EEPROM 1
-#define CONFIG_ENV_OFFSET 0x00 /* environment starts here */
-#define CONFIG_ENV_SIZE 4096
+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
+#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */
+/* Monitor at beginning of flash */
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+
+#define CONFIG_ENV_IS_IN_EEPROM
+#define CONFIG_ENV_OFFSET 0x00 /* env. starts here */
+#define CONFIG_ENV_SIZE 4096
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* between stop and start */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* length of byte address */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */
-/*-----------------------------------------------------------------------
+/*
* CFI FLASH driver setup
*/
-#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
-#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
-#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
+#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
+#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
+#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
+/*
+ * Timeout for Flash Erase and Flash Write
+ * timeout values are in ticks
+ */
+#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ)
/*
* JFFS2 partitions
@@ -196,11 +211,11 @@
#define CONFIG_MXC_GPIO
-#define CONFIG_HARD_SPI 1
-#define CONFIG_MXC_SPI 1
+#define CONFIG_HARD_SPI
+#define CONFIG_MXC_SPI
#define CONFIG_CMD_SPI
-#define CONFIG_S6E63D6 1
+#define CONFIG_S6E63D6
#define CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE