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| author | Jason <r64343@freescale.com> | 2009-10-12 10:48:31 +0800 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2009-11-04 11:37:53 +0800 |
| commit | 6532550c9f7e96cbe32488f24ca53b2e3648fef1 (patch) | |
| tree | b1aa234aa1370d50cdaa2df9c3d7dfbcbc0a7a2c /include | |
| parent | 1fa19862acbd764533c0d3d6e09cca768e7a9d81 (diff) | |
| download | u-boot-imx-6532550c9f7e96cbe32488f24ca53b2e3648fef1.zip u-boot-imx-6532550c9f7e96cbe32488f24ca53b2e3648fef1.tar.gz u-boot-imx-6532550c9f7e96cbe32488f24ca53b2e3648fef1.tar.bz2 | |
ENGR00116924 Uboot: Boot up hang at detecting NAND when cold boot
Boot from MMC card failed at detecting NAND. The fix will
1. Set RBB_MODE to 1 and using atomic status command
2. Set FW correctly by adding CONFIG_NAND_FW_8 config
3. Correct the BLS register value
Signed-off-by:Jason Liu <r64343@freescale.com>
(cherry picked from commit 7142651386271c340a6ae061a6e2893695675724)
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-mx51/mxc_nand.h | 16 | ||||
| -rw-r--r-- | include/configs/mx51_3stack.h | 1 |
2 files changed, 10 insertions, 7 deletions
diff --git a/include/asm-arm/arch-mx51/mxc_nand.h b/include/asm-arm/arch-mx51/mxc_nand.h index 539d0fd..ee5bf91 100644 --- a/include/asm-arm/arch-mx51/mxc_nand.h +++ b/include/asm-arm/arch-mx51/mxc_nand.h @@ -72,7 +72,7 @@ #define IS_4BIT_ECC \ ( \ - is_soc_rev(CHIP_REV_2_0) == 0 ? \ + is_soc_rev(CHIP_REV_2_0) >= 0 ? \ !((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) : \ ((raw_read(NFC_CONFIG2) & NFC_ECC_MODE_4) >> 6) \ ) @@ -84,7 +84,7 @@ #define NFC_SET_ECC_MODE(v) \ do { \ - if (is_soc_rev(CHIP_REV_2_0) == 0) { \ + if (is_soc_rev(CHIP_REV_2_0) >= 0) { \ if ((v) == NFC_SPAS_218 || (v) == NFC_SPAS_112) \ raw_write(((raw_read(NFC_CONFIG2) & \ NFC_ECC_MODE_MASK) | \ @@ -201,9 +201,9 @@ do { \ #define NFC_PPB_256 (3 << 7) #define NFC_PPB_RESET (~(3 << 7)) -#define NFC_BLS_LOCKED (0 << 16) -#define NFC_BLS_LOCKED_DEFAULT (1 << 16) -#define NFC_BLS_UNLCOKED (2 << 16) +#define NFC_BLS_LOCKED (0 << 6) +#define NFC_BLS_LOCKED_DEFAULT (1 << 6) +#define NFC_BLS_UNLCOKED (2 << 6) #define NFC_BLS_RESET (~(3 << 16)) #define NFC_WPC_LOCK_TIGHT 1 #define NFC_WPC_LOCK (1 << 1) @@ -335,7 +335,8 @@ do { \ /*should set the fw,ps,spas,ppb*/ #define NFC_SET_NFMS(v) \ do { \ - NFC_SET_FW(NFC_FW_8); \ + if (!(v)) \ + NFC_SET_FW(NFC_FW_8); \ if (((v) & (1 << NFMS_NF_DWIDTH))) \ NFC_SET_FW(NFC_FW_16); \ if (((v) & (1 << NFMS_NF_PG_SZ))) { \ @@ -356,7 +357,8 @@ do { \ NFC_SET_SPAS(GET_NAND_OOB_SIZE >> 1); \ NFC_SET_ECC_MODE(GET_NAND_OOB_SIZE >> 1); \ NFC_SET_ST_CMD(0x70); \ - raw_write(raw_read(NFC_CONFIG3) | 1 << 20, NFC_CONFIG3); \ + raw_write(raw_read(NFC_CONFIG3) | NFC_NO_SDMA, NFC_CONFIG3); \ + raw_write(raw_read(NFC_CONFIG3) | NFC_RBB_MODE, NFC_CONFIG3); \ } \ } while (0) diff --git a/include/configs/mx51_3stack.h b/include/configs/mx51_3stack.h index e0fa523..bd2d27b 100644 --- a/include/configs/mx51_3stack.h +++ b/include/configs/mx51_3stack.h @@ -205,6 +205,7 @@ #define NAND_MAX_CHIPS 8 #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_NAND_FW_16BIT 0 /* 1: 16bit 0: 8bit */ /* Monitor at beginning of flash */ #define CONFIG_FSL_ENV_IN_NAND |