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authorPeter Pearse <peter.pearse@arm.com>2007-09-07 13:26:51 +0100
committerPeter Pearse <peter.pearse@arm.com>2007-09-07 13:26:51 +0100
commit470ffef72cf565c4db59352c23bd06cbfb763128 (patch)
tree8f175868f568e7f535436407f72f56198928ea7e /include
parent80767a6cead9990d9e77e62be947843c2c72f469 (diff)
parenta89cbbd27a60e6740772000fd0688ffba1c2576a (diff)
downloadu-boot-imx-470ffef72cf565c4db59352c23bd06cbfb763128.zip
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Merge with git://www.denx.de/git/u-boot.git
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h18
-rw-r--r--include/asm-mips/string.h156
-rw-r--r--include/configs/IceCube.h2
-rw-r--r--include/configs/MPC8544DS.h3
-rw-r--r--include/configs/TQM5200.h2
-rw-r--r--include/configs/jupiter.h2
-rw-r--r--include/configs/motionpro.h2
-rw-r--r--include/configs/sequoia.h3
-rw-r--r--include/configs/trizepsiv.h325
-rw-r--r--include/libfdt.h2
-rw-r--r--include/serial.h4
11 files changed, 368 insertions, 151 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index e8cb299..9b4da3a 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1288,15 +1288,15 @@ typedef void (*ExcpHndlr) (void) ;
#define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3)
#define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2)
-#define GPLR(x) ((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3)
-#define GPDR(x) ((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3)
-#define GPSR(x) ((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3)
-#define GPCR(x) ((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3)
-#define GRER(x) ((((x) & 0x7f) < 96) ? _GRER(x) : GRER3)
-#define GFER(x) ((((x) & 0x7f) < 96) ? _GFER(x) : GFER3)
-#define GEDR(x) ((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3)
-#define GAFR(x) ((((x) & 0x7f) < 96) ? _GAFR(x) : \
- ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U))
+#define GPLR(x) __REG2(0x40E00000 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GPDR(x) __REG2(0x40E0000C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GPSR(x) __REG2(0x40E00018 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GPCR(x) __REG2(0x40E00024 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GRER(x) __REG2(0x40E00030 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GFER(x) __REG2(0x40E0003C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GEDR(x) __REG2(0x40E00048 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GAFR(x) __REG2((((x) & 0x7f) < 96) ? 0x40E00054 : \
+ ((((x) & 0x7f) < 112) ? 0x40E0006C : 0x40E00070),((x) & 0x60) >> 3)
#else
#define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3)
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 463a111..c42ad82 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -1,126 +1,31 @@
-/* $Id: string.h,v 1.13 2000/02/19 14:12:14 harald Exp $
- *
+/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 1994, 1995, 1996, 1997, 1998 by Ralf Baechle
+ * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle
+ * Copyright (c) 2000 by Silicon Graphics, Inc.
+ * Copyright (c) 2001 MIPS Technologies, Inc.
*/
-#ifndef __ASM_MIPS_STRING_H
-#define __ASM_MIPS_STRING_H
-
-#include <linux/config.h>
-
-#define __HAVE_ARCH_STRCPY
-extern __inline__ char *strcpy(char *__dest, __const__ char *__src)
-{
- char *__xdest = __dest;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n"
- "1:\tlbu\t$1,(%1)\n\t"
- "addiu\t%1,1\n\t"
- "sb\t$1,(%0)\n\t"
- "bnez\t$1,1b\n\t"
- "addiu\t%0,1\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (__dest), "=r" (__src)
- : "0" (__dest), "1" (__src)
- : "$1","memory");
-
- return __xdest;
-}
-
-#define __HAVE_ARCH_STRNCPY
-extern __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n)
-{
- char *__xdest = __dest;
-
- if (__n == 0)
- return __xdest;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n"
- "1:\tlbu\t$1,(%1)\n\t"
- "subu\t%2,1\n\t"
- "sb\t$1,(%0)\n\t"
- "beqz\t$1,2f\n\t"
- "addiu\t%0,1\n\t"
- "bnez\t%2,1b\n\t"
- "addiu\t%1,1\n"
- "2:\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (__dest), "=r" (__src), "=r" (__n)
- : "0" (__dest), "1" (__src), "2" (__n)
- : "$1","memory");
+#ifndef _ASM_STRING_H
+#define _ASM_STRING_H
- return __dest;
-}
-
-#define __HAVE_ARCH_STRCMP
-extern __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct)
-{
- int __res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "lbu\t%2,(%0)\n"
- "1:\tlbu\t$1,(%1)\n\t"
- "addiu\t%0,1\n\t"
- "bne\t$1,%2,2f\n\t"
- "addiu\t%1,1\n\t"
- "bnez\t%2,1b\n\t"
- "lbu\t%2,(%0)\n\t"
-#if defined(CONFIG_CPU_R3000)
- "nop\n\t"
-#endif
- "move\t%2,$1\n"
- "2:\tsubu\t%2,$1\n"
- "3:\t.set\tat\n\t"
- ".set\treorder"
- : "=r" (__cs), "=r" (__ct), "=r" (__res)
- : "0" (__cs), "1" (__ct)
- : "$1");
+/*
+ * We don't do inline string functions, since the
+ * optimised inline asm versions are not small.
+ */
- return __res;
-}
+#undef __HAVE_ARCH_STRCPY
+extern char *strcpy(char *__dest, __const__ char *__src);
-#define __HAVE_ARCH_STRNCMP
-extern __inline__ int
-strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
-{
- int __res;
+#undef __HAVE_ARCH_STRNCPY
+extern char *strncpy(char *__dest, __const__ char *__src, size_t __n);
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n"
- "1:\tlbu\t%3,(%0)\n\t"
- "beqz\t%2,2f\n\t"
- "lbu\t$1,(%1)\n\t"
- "subu\t%2,1\n\t"
- "bne\t$1,%3,3f\n\t"
- "addiu\t%0,1\n\t"
- "bnez\t%3,1b\n\t"
- "addiu\t%1,1\n"
- "2:\n\t"
-#if defined(CONFIG_CPU_R3000)
- "nop\n\t"
-#endif
- "move\t%3,$1\n"
- "3:\tsubu\t%3,$1\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res)
- : "0" (__cs), "1" (__ct), "2" (__count)
- : "$1");
+#undef __HAVE_ARCH_STRCMP
+extern int strcmp(__const__ char *__cs, __const__ char *__ct);
- return __res;
-}
+#undef __HAVE_ARCH_STRNCMP
+extern int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count);
#undef __HAVE_ARCH_MEMSET
extern void *memset(void *__s, int __c, size_t __count);
@@ -131,27 +36,4 @@ extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
#undef __HAVE_ARCH_MEMMOVE
extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
-/* Don't build bcopy at all ... */
-#define __HAVE_ARCH_BCOPY
-
-#define __HAVE_ARCH_MEMSCAN
-extern __inline__ void *memscan(void *__addr, int __c, size_t __size)
-{
- char *__end = (char *)__addr + __size;
-
- __asm__(".set\tpush\n\t"
- ".set\tnoat\n\t"
- ".set\treorder\n\t"
- "1:\tbeq\t%0,%1,2f\n\t"
- "addiu\t%0,1\n\t"
- "lb\t$1,-1(%0)\n\t"
- "bne\t$1,%4,1b\n"
- "2:\t.set\tpop"
- : "=r" (__addr), "=r" (__end)
- : "0" (__addr), "1" (__end), "r" (__c)
- : "$1");
-
- return __addr;
-}
-
-#endif /* __ASM_MIPS_STRING_H */
+#endif /* _ASM_STRING_H */
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index bdd92ba..4c16d22 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -178,7 +178,7 @@
#endif /* CONFIG_MPC5200 */
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,5200@0"
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 9743f03..f580cca 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -310,6 +310,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CFG_PCIE3_IO_BASE 0x00000000
#define CFG_PCIE3_IO_PHYS 0xb0100000 /* reuse mem LAW */
#define CFG_PCIE3_IO_SIZE 0x00100000 /* 1M */
+#define CFG_PCIE3_MEM_BASE2 0xb0200000
+#define CFG_PCIE3_MEM_PHYS2 CFG_PCIE3_MEM_BASE2
+#define CFG_PCIE3_MEM_SIZE2 0x00200000 /* 1M */
#if defined(CONFIG_PCI)
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index c08173b..e0c9d81 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -701,7 +701,7 @@
* Open firmware flat tree support
*-----------------------------------------------------------------------
*/
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,5200@0"
diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h
index 4070ab9..b7100e9 100644
--- a/include/configs/jupiter.h
+++ b/include/configs/jupiter.h
@@ -145,7 +145,7 @@
#if 0
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,5200@0"
diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h
index 82827c6..9a21632 100644
--- a/include/configs/motionpro.h
+++ b/include/configs/motionpro.h
@@ -417,7 +417,7 @@ extern void __led_set(led_id_t id, int state);
#define CFG_RESET_ADDRESS 0xfff00100
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,5200@0"
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 824a812..c2e1386 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -400,7 +400,8 @@
*----------------------------------------------------------------------*/
/* General PCI */
#define CONFIG_PCI /* include pci support */
-#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CFG_PCI_CACHE_LINE_SIZE 0 /* to avoid problems with PNP */
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
new file mode 100644
index 0000000..84998d4
--- /dev/null
+++ b/include/configs/trizepsiv.h
@@ -0,0 +1,325 @@
+/*
+ * (C) Copyright 2007
+ * Stefano Babic, DENX Gmbh, sbabic@denx.de
+ *
+ * (C) Copyright 2004
+ * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
+ *
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Configuation settings for the LUBBOCK board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_PXA27X 1 /* This is an PXA27x CPU */
+
+#define LITTLEENDIAN 1 /* used by usb_ohci.c */
+
+#define CONFIG_MMC 1
+#define BOARD_LATE_INIT 1
+
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define RTC
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_FFUART 1 /* we use FFUART on Conxs */
+#define CONFIG_BTUART 1 /* we use BTUART on Conxs */
+#define CONFIG_STUART 1 /* we use STUART on Conxs */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 38400
+
+#define CONFIG_DOS_PARTITION 1
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IMLS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+
+#undef CONFIG_SHOW_BOOT_PROGRESS
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_SERVERIP 192.168.1.99
+#define CONFIG_BOOTCOMMAND "run boot_flash"
+#define CONFIG_BOOTARGS "console=ttyS0,38400 ramdisk_size=12288"\
+ " rw root=/dev/ram initrd=0xa0800000,5m"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "program_boot_mmc=" \
+ "mw.b 0xa0010000 0xff 0x20000; " \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0010000 u-boot.bin; " \
+ "then " \
+ "protect off 0x0 0x1ffff; " \
+ "erase 0x0 0x1ffff; " \
+ "cp.b 0xa0010000 0x0 0x20000; " \
+ "fi\0" \
+ "program_uzImage_mmc=" \
+ "mw.b 0xa0010000 0xff 0x180000; " \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0010000 uzImage; " \
+ "then " \
+ "protect off 0x40000 0x1bffff; " \
+ "erase 0x40000 0x1bffff; " \
+ "cp.b 0xa0010000 0x40000 0x180000; " \
+ "fi\0" \
+ "program_ramdisk_mmc=" \
+ "mw.b 0xa0010000 0xff 0x500000; " \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0010000 ramdisk.gz; " \
+ "then " \
+ "protect off 0x1c0000 0x6bffff; " \
+ "erase 0x1c0000 0x6bffff; " \
+ "cp.b 0xa0010000 0x1c0000 0x500000; " \
+ "fi\0" \
+ "boot_mmc=" \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0030000 uzImage && " \
+ "fatload mmc 0 0xa0800000 ramdisk.gz; " \
+ "then " \
+ "bootm 0xa0030000; " \
+ "fi\0" \
+ "boot_flash=" \
+ "cp.b 0x1c0000 0xa0800000 0x500000; " \
+ "bootm 0x40000\0" \
+
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+/* #define CONFIG_INITRD_TAG 1 */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_HUSH_PARSER 1
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#define CFG_LONGHELP /* undef to save memory */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT "$ " /* Monitor Command Prompt */
+#else
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#endif
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_DEVICE_NULLDEV 1
+
+#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0xa1000000 /* default load address */
+
+#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
+#define CFG_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
+
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+#define CFG_MMC_BASE 0xF0000000
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
+#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
+#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
+#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
+
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+
+#define CFG_DRAM_BASE 0xa0000000
+#define CFG_DRAM_SIZE 0x04000000
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*
+ * GPIO settings
+ */
+#define CFG_GPSR0_VAL 0x00018000
+#define CFG_GPSR1_VAL 0x00000000
+#define CFG_GPSR2_VAL 0x400dc000
+#define CFG_GPSR3_VAL 0x00000000
+#define CFG_GPCR0_VAL 0x00000000
+#define CFG_GPCR1_VAL 0x00000000
+#define CFG_GPCR2_VAL 0x00000000
+#define CFG_GPCR3_VAL 0x00000000
+#define CFG_GPDR0_VAL 0x00018000
+#define CFG_GPDR1_VAL 0x00028801
+#define CFG_GPDR2_VAL 0x520dc000
+#define CFG_GPDR3_VAL 0x0001E000
+#define CFG_GAFR0_L_VAL 0x801c0000
+#define CFG_GAFR0_U_VAL 0x00000013
+#define CFG_GAFR1_L_VAL 0x6990100A
+#define CFG_GAFR1_U_VAL 0x00000008
+#define CFG_GAFR2_L_VAL 0xA0000000
+#define CFG_GAFR2_U_VAL 0x010900F2
+#define CFG_GAFR3_L_VAL 0x54000003
+#define CFG_GAFR3_U_VAL 0x00002401
+#define CFG_GRER0_VAL 0x00000000
+#define CFG_GRER1_VAL 0x00000000
+#define CFG_GRER2_VAL 0x00000000
+#define CFG_GRER3_VAL 0x00000000
+#define CFG_GFER0_VAL 0x00000000
+#define CFG_GFER1_VAL 0x00000000
+#define CFG_GFER2_VAL 0x00000000
+#define CFG_GFER3_VAL 0x00000020
+
+
+#define CFG_PSSR_VAL 0x20 /* CHECK */
+
+/*
+ * Clock settings
+ */
+#define CFG_CKEN 0x01FFFFFF /* CHECK */
+#define CFG_CCCR 0x02000290 /* 520Mhz */
+
+/*
+ * Memory settings
+ */
+
+#define CFG_MSC0_VAL 0x4df84df0
+#define CFG_MSC1_VAL 0x7ff87ff4
+#define CFG_MSC2_VAL 0xa26936d4
+#define CFG_MDCNFG_VAL 0x880009C9
+#define CFG_MDREFR_VAL 0x20ca201e
+#define CFG_MDMRS_VAL 0x00220022
+
+#define CFG_FLYCNFG_VAL 0x00000000
+#define CFG_SXCNFG_VAL 0x40044004
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+#define CFG_MECR_VAL 0x00000001
+#define CFG_MCMEM0_VAL 0x00004204
+#define CFG_MCMEM1_VAL 0x00010204
+#define CFG_MCATT0_VAL 0x00010504
+#define CFG_MCATT1_VAL 0x00010504
+#define CFG_MCIO0_VAL 0x00008407
+#define CFG_MCIO1_VAL 0x0000c108
+
+#define CONFIG_DRIVER_DM9000 1
+#define CONFIG_DRIVER_DM9000 1
+#define CONFIG_DM9000_BASE 0x08000000
+#define DM9000_IO CONFIG_DM9000_BASE
+#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004)
+/* #define CONFIG_DM9000_USE_8BIT */
+/* #define CONFIG_DM9000_USE_16BIT */
+#define CONFIG_DM9000_USE_32BIT
+
+#define CONFIG_USB_OHCI_NEW 1
+#define CFG_USB_OHCI_BOARD_INIT 1
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 3
+#define CFG_USB_OHCI_REGS_BASE 0x4C000000
+#define CFG_USB_OHCI_SLOT_NAME "trizepsiv"
+#define CONFIG_USB_STORAGE 1
+#define CFG_USB_OHCI_CPU_INIT 1
+
+/*
+ * FLASH and environment organization
+ */
+
+#define CFG_FLASH_CFI
+#define CFG_FLASH_CFI_DRIVER 1
+
+#define CFG_MONITOR_BASE 0
+#define CFG_MONITOR_LEN 0x40000
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 4 + 255 /* max number of sectors on one chip */
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
+
+/* write flash less slowly */
+#define CFG_FLASH_USE_BUFFER_WRITE 1
+
+/* Flash environment locations */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) /* Addr of Environment Sector */
+#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment */
+#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+#endif /* __CONFIG_H */
diff --git a/include/libfdt.h b/include/libfdt.h
index 340e89d..38c65a9 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -140,6 +140,8 @@ int fdt_setprop(void *fdt, int nodeoffset, const char *name,
})
#define fdt_setprop_string(fdt, nodeoffset, name, str) \
fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
+ const void *val, int len, int create);
int fdt_delprop(void *fdt, int nodeoffset, const char *name);
int fdt_add_subnode_namelen(void *fdt, int parentoffset,
const char *name, int namelen);
diff --git a/include/serial.h b/include/serial.h
index f7412fd..30bfde3 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -36,6 +36,10 @@ extern struct serial_device eserial4_device;
#endif
+extern struct serial_device serial_ffuart_device;
+extern struct serial_device serial_btuart_device;
+extern struct serial_device serial_stuart_device;
+
extern void serial_initialize(void);
extern void serial_devices_init(void);
extern int serial_assign(char * name);