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authorMinghuan Lian <Minghuan.Lian@nxp.com>2016-12-13 14:54:19 +0800
committerYork Sun <york.sun@nxp.com>2017-01-18 09:26:53 -0800
commit41873d1571613230faab17286fe40e1b192e6c2d (patch)
treef48af85ab4c90fe4626496d5ba4e2fbe09feb054 /include
parent8808aeb7a93dc36973f3a421e00d8e32318b0352 (diff)
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arm: ls1012a: Enable PCIe and E1000 in defconfigs
The patch enables PCIe and E1000 in ls1012a defconfigs and removes unused PCIe related macro defines Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/ls1012aqds.h16
-rw-r--r--include/configs/ls1012ardb.h16
2 files changed, 0 insertions, 32 deletions
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index b5b4d7e..4d9a814 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -154,24 +154,8 @@
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_PCIE1 /* PCIE controller 1 */
-#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
-#define CONFIG_SYS_PCI_64BIT
-
-#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
-#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
-#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
-#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
-
-#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
-#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
-
-#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
-#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
-#define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */
-
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index f35fd31..23214e7 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -67,24 +67,8 @@
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_PCIE1 /* PCIE controller 1 */
-#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
-#define CONFIG_SYS_PCI_64BIT
-
-#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
-#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
-#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
-#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
-
-#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
-#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
-
-#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
-#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
-#define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */
-
#define CONFIG_NET_MULTI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI