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authorAndy Fleming <afleming@freescale.com>2008-08-31 16:33:27 -0500
committerBen Warren <biggerbadderben@gmail.com>2008-09-02 21:18:15 -0700
commit2abe361c03b43e6dcf68f54e96b5c05156c49284 (patch)
tree198447e2f30bf205d833695e54b6527fedccb28b /include
parent75b9d4ae0d69f214eab641caf12ce8af83a39a42 (diff)
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Add SGMII support to the tsec
Adds support for configuring the TBI to talk properly with the SerDes. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/tsec.h25
1 files changed, 24 insertions, 1 deletions
diff --git a/include/tsec.h b/include/tsec.h
index c05b5f0..2db4deb 100644
--- a/include/tsec.h
+++ b/include/tsec.h
@@ -60,6 +60,27 @@
#define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* in ms */
+/* TBI register addresses */
+#define TBI_CR 0x00
+#define TBI_SR 0x01
+#define TBI_ANA 0x04
+#define TBI_ANLPBPA 0x05
+#define TBI_ANEX 0x06
+#define TBI_TBICON 0x11
+
+/* TBI MDIO register bit fields*/
+#define TBICON_CLK_SELECT 0x0020
+#define TBIANA_ASYMMETRIC_PAUSE 0x0100
+#define TBIANA_SYMMETRIC_PAUSE 0x0080
+#define TBIANA_HALF_DUPLEX 0x0040
+#define TBIANA_FULL_DUPLEX 0x0020
+#define TBICR_PHY_RESET 0x8000
+#define TBICR_ANEG_ENABLE 0x1000
+#define TBICR_RESTART_ANEG 0x0200
+#define TBICR_FULL_DUPLEX 0x0100
+#define TBICR_SPEED1_SET 0x0040
+
+
/* MAC register bits */
#define MACCFG1_SOFT_RESET 0x80000000
#define MACCFG1_RESET_RX_MC 0x00080000
@@ -540,7 +561,9 @@ typedef struct tsec
/* This flag currently only has
* meaning if we're using the eTSEC */
-#define TSEC_REDUCED (1 << 1)
+#define TSEC_REDUCED (1 << 1)
+
+#define TSEC_SGMII (1 << 2)
struct tsec_private {
volatile tsec_t *regs;