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authorStephan Linz <linz@li-pro.net>2011-11-24 12:32:52 +0000
committerWolfgang Denk <wd@denx.de>2011-11-27 15:49:48 +0100
commit1de55ef105f9e00ea313c91679fed6560c63f447 (patch)
tree9e6655d76cb2e98b18bff4ea763a4b563d117932 /include
parent94f61429574f367f64a7ebb92fa664123cee468b (diff)
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microblaze: usable uart16550 for big endian systems
As a result of the commit 6833260 the uart16550 driver is broken for Microblaze big endian systems, because of the missing 3 byte offset. Other than as described, not all U-Boot BSP will treat properly the 3 byte offset. This why prefer to mask out the 3 byte offset in general and setup correct _REG_SIZE value depending on edianess. Signed-off-by: Stephan Linz <linz@li-pro.net> Tested-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'include')
-rw-r--r--include/configs/microblaze-generic.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 6b3fd76..03a6f5a 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -41,10 +41,14 @@
#elif XILINX_UART16550_BASEADDR
# define CONFIG_SYS_NS16550 1
# define CONFIG_SYS_NS16550_SERIAL
-# define CONFIG_SYS_NS16550_REG_SIZE -4
+# if defined(__MICROBLAZEEL__)
+# define CONFIG_SYS_NS16550_REG_SIZE -4
+# else
+# define CONFIG_SYS_NS16550_REG_SIZE 4
+# endif
# define CONFIG_CONS_INDEX 1
# define CONFIG_SYS_NS16550_COM1 \
- (XILINX_UART16550_BASEADDR + 0x1000)
+ ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
# define CONFIG_BAUDRATE 115200