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authorWolfgang Denk <wd@denx.de>2011-05-18 14:31:56 +0200
committerWolfgang Denk <wd@denx.de>2011-05-18 14:31:56 +0200
commit0ea91423f47461bf7eaed2d4aff198076dd07fd5 (patch)
treeb5201f976fe3f7f5ed6f485f7ef81d8d8c9ec033 /include
parentce6400a0f88f9648d6def519244ea8c33c7612b2 (diff)
parent24890f11980eb70d835ca7e0b00d32284d8f546c (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (40 commits) avr32: add ATAG_BOARDINFO at91: reworked support for otc570 board at91: reworked support for meesc board hammerhead: move CONFIG_SYS_TEXT_BASE to header mimc200: move CONFIG_SYS_TEXT_BASE to header favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header atstk100x: move CONFIG_SYS_TEXT_BASE to header atngw100: move CONFIG_SYS_TEXT_BASE to header mimc200: fix "#define XXXX 1" hammerhead: fix "#define XXXX 1" favr-32-ezkit: fix "#define XXXX 1" atstk1006: fix "#define XXXX 1" atstk1004: fix "#define XXXX 1" atstk1003: fix "#define XXXX 1" atstk1002: fix "#define XXXX 1" atngw100: fix "#define XXXX 1" avr32: use single linker script avr32/config.mk: simplify PLATFORM_RELFLAGS avr32: fix linking Add support for Bluewater Systems Snapper 9260 and 9G20 modules ...
Diffstat (limited to 'include')
-rw-r--r--include/configs/atngw100.h61
-rw-r--r--include/configs/atstk1002.h57
-rw-r--r--include/configs/atstk1003.h51
-rw-r--r--include/configs/atstk1004.h51
-rw-r--r--include/configs/atstk1006.h57
-rw-r--r--include/configs/favr-32-ezkit.h55
-rw-r--r--include/configs/hammerhead.h52
-rw-r--r--include/configs/mimc200.h63
-rw-r--r--include/configs/otc570.h265
-rw-r--r--include/dataflash.h1
10 files changed, 374 insertions, 339 deletions
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 92491ca..bda6eed 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -24,12 +24,12 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_ATNGW100 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATNGW100
#define CONFIG_SYS_HZ 1000
@@ -38,8 +38,8 @@
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
* and the PBA bus to run at 1/4 the PLL frequency.
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 20000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 7
@@ -61,14 +61,14 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#define CONFIG_USART1 1
-
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -83,8 +83,8 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
@@ -95,8 +95,8 @@
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*
* BOOTP/DHCP options
@@ -123,25 +123,25 @@
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
-#define CONFIG_ATMEL_SPI 1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
+#define CONFIG_ATMEL_SPI
-#define CONFIG_SPI_FLASH 1
-#define CONFIG_SPI_FLASH_ATMEL 1
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_BASE 0x00000000
#define CONFIG_SYS_FLASH_SIZE 0x800000
@@ -149,12 +149,13 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -172,7 +173,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 6416d17..c17d107 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -24,15 +24,15 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_ATSTK1002 1
-#define CONFIG_ATSTK1000 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATSTK1002
+#define CONFIG_ATSTK1000
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
/*
* Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
* PLL frequency.
* (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 20000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 7
@@ -85,17 +85,15 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#undef CONFIG_USART0
-#define CONFIG_USART1 1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -111,8 +109,8 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
@@ -123,8 +121,8 @@
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*
* BOOTP options
@@ -150,13 +148,13 @@
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32
@@ -175,12 +173,13 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -198,7 +197,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
diff --git a/include/configs/atstk1003.h b/include/configs/atstk1003.h
index a4d9b0b..a77d52e 100644
--- a/include/configs/atstk1003.h
+++ b/include/configs/atstk1003.h
@@ -24,15 +24,15 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7001 1
-#define CONFIG_ATSTK1003 1
-#define CONFIG_ATSTK1000 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7001
+#define CONFIG_ATSTK1003
+#define CONFIG_ATSTK1000
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
/*
* Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
* PLL frequency.
* (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 20000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 7
@@ -85,17 +85,15 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#undef CONFIG_USART0
-#define CONFIG_USART1 1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -111,8 +109,8 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
@@ -135,11 +133,11 @@
#undef CONFIG_CMD_SETGETDCR
#undef CONFIG_CMD_XIMG
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_PORTMUX_PIO 1
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32
@@ -158,12 +156,13 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -180,7 +179,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
diff --git a/include/configs/atstk1004.h b/include/configs/atstk1004.h
index 06bb5da..cc00a0a 100644
--- a/include/configs/atstk1004.h
+++ b/include/configs/atstk1004.h
@@ -24,15 +24,15 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7002 1
-#define CONFIG_ATSTK1004 1
-#define CONFIG_ATSTK1000 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7002
+#define CONFIG_ATSTK1004
+#define CONFIG_ATSTK1000
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
/*
* Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
* PLL frequency.
* (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 20000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 7
@@ -85,17 +85,15 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#undef CONFIG_USART0
-#define CONFIG_USART1 1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -111,8 +109,8 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
@@ -135,11 +133,11 @@
#undef CONFIG_CMD_SETGETDCR
#undef CONFIG_CMD_XIMG
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_PORTMUX_PIO 1
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_PORTMUX_PIO
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32
@@ -158,12 +156,13 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -180,7 +179,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h
index d3cbee6..2cff140 100644
--- a/include/configs/atstk1006.h
+++ b/include/configs/atstk1006.h
@@ -24,15 +24,15 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_ATSTK1006 1
-#define CONFIG_ATSTK1000 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_ATSTK1006
+#define CONFIG_ATSTK1000
-#define CONFIG_ATSTK1000_EXT_FLASH 1
+#define CONFIG_ATSTK1000_EXT_FLASH
/*
* Timer clock frequency. We're using the CPU-internal COUNT register
@@ -46,8 +46,8 @@
* PLL frequency.
* (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 20000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 7
@@ -85,17 +85,15 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#undef CONFIG_USART0
-#define CONFIG_USART1 1
-#undef CONFIG_USART2
-#undef CONFIG_USART3
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -111,8 +109,8 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
@@ -123,8 +121,8 @@
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*
* BOOTP options
@@ -150,13 +148,13 @@
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32
@@ -175,12 +173,13 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -198,7 +197,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x3f00000)
diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h
index 1c381c7..4c30b39 100644
--- a/include/configs/favr-32-ezkit.h
+++ b/include/configs/favr-32-ezkit.h
@@ -22,14 +22,14 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_FAVR32_EZKIT 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_FAVR32_EZKIT
-#define CONFIG_FAVR32_EZKIT_EXT_FLASH 1
+#define CONFIG_FAVR32_EZKIT_EXT_FLASH
/*
* Timer clock frequency. We're using the CPU-internal COUNT register
@@ -43,8 +43,8 @@
* PLL frequency.
* (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 20000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 7
@@ -82,17 +82,15 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3 1
+#define CONFIG_USART_BASE ATMEL_BASE_USART3
+#define CONFIG_USART_ID 3
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -108,8 +106,8 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
@@ -120,8 +118,8 @@
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*
* BOOTP options
@@ -147,13 +145,13 @@
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_XIMG
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32
@@ -172,12 +170,13 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -195,7 +194,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h
index 8ca04ea..bfdfc0a 100644
--- a/include/configs/hammerhead.h
+++ b/include/configs/hammerhead.h
@@ -24,10 +24,10 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_HAMMERHEAD 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_HAMMERHEAD
#define CONFIG_SYS_HZ 1000
@@ -36,8 +36,8 @@
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
* and the PBA bus to run at 1/4 the PLL frequency.
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 25000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 5
@@ -59,16 +59,17 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#define CONFIG_USART1 1
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
#define CONFIG_HOSTNAME hammerhead
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -83,8 +84,8 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 1
-#define CONFIG_AUTOBOOT 1
-#define CONFIG_AUTOBOOT_KEYED 1
+#define CONFIG_AUTOBOOT
+#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
@@ -95,8 +96,8 @@
* should be generated and assigned to the environment variables
* "ethaddr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*
* BOOTP/DHCP options
@@ -118,21 +119,21 @@
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#define CONFIG_SYS_DCACHE_LINESZ 32
#define CONFIG_SYS_ICACHE_LINESZ 32
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_BASE 0x00000000
#define CONFIG_SYS_FLASH_SIZE 0x800000
@@ -140,13 +141,14 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE 0x24000000
#define CONFIG_SYS_INTRAM_SIZE 0x8000
#define CONFIG_SYS_SDRAM_BASE 0x10000000
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -165,7 +167,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h
index 16e2ec6..6c52769 100644
--- a/include/configs/mimc200.h
+++ b/include/configs/mimc200.h
@@ -24,14 +24,14 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
-#define CONFIG_AVR32 1
-#define CONFIG_AT32AP 1
-#define CONFIG_AT32AP7000 1
-#define CONFIG_MIMC200 1
+#define CONFIG_AVR32
+#define CONFIG_AT32AP
+#define CONFIG_AT32AP7000
+#define CONFIG_MIMC200
-#define CONFIG_MIMC200_EXT_FLASH 1
+#define CONFIG_MIMC200_EXT_FLASH
#define CONFIG_SYS_HZ 1000
@@ -40,8 +40,8 @@
* frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
* and the PBA bus to run at 1/4 the PLL frequency.
*/
-#define CONFIG_PLL 1
-#define CONFIG_SYS_POWER_MANAGER 1
+#define CONFIG_PLL
+#define CONFIG_SYS_POWER_MANAGER
#define CONFIG_SYS_OSC0_HZ 10000000
#define CONFIG_SYS_PLL0_DIV 1
#define CONFIG_SYS_PLL0_MUL 15
@@ -63,15 +63,17 @@
*/
#define CONFIG_SYS_PLL0_OPT 0x04
-#define CONFIG_USART1 1
+#define CONFIG_USART_BASE ATMEL_BASE_USART1
+#define CONFIG_USART_ID 1
+
#define CONFIG_MIMC200_DBGLINK 1
/* User serviceable stuff */
-#define CONFIG_DOS_PARTITION 1
+#define CONFIG_DOS_PARTITION
-#define CONFIG_CMDLINE_TAG 1
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_STACKSIZE (2048)
@@ -81,9 +83,9 @@
#define CONFIG_BOOTCOMMAND \
"fsload boot/uImage; bootm"
-#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
-#define CONFIG_DISABLE_CONSOLE 1 /* disable console */
-#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
+#define CONFIG_SILENT_CONSOLE /* enable silent startup */
+#define CONFIG_DISABLE_CONSOLE /* disable console */
+#define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */
#define CONFIG_LCD 1
@@ -92,16 +94,16 @@
* data on the serial line may interrupt the boot sequence.
*/
#define CONFIG_BOOTDELAY 0
-#define CONFIG_ZERO_BOOTDELAY_CHECK 1
-#define CONFIG_AUTOBOOT 1
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_AUTOBOOT
/*
* After booting the board for the first time, new ethernet addresses
* should be generated and assigned to the environment variables
* "ethaddr" and "eth1addr". This is normally done during production.
*/
-#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_NET_MULTI
/*
* BOOTP/DHCP options
@@ -122,13 +124,13 @@
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
-#define CONFIG_ATMEL_USART 1
-#define CONFIG_MACB 1
-#define CONFIG_PORTMUX_PIO 1
+#define CONFIG_ATMEL_USART
+#define CONFIG_MACB
+#define CONFIG_PORTMUX_PIO
#define CONFIG_SYS_NR_PIOS 5
-#define CONFIG_SYS_HSDRAMC 1
-#define CONFIG_MMC 1
-#define CONFIG_ATMEL_MCI 1
+#define CONFIG_SYS_HSDRAMC
+#define CONFIG_MMC
+#define CONFIG_ATMEL_MCI
#if defined(CONFIG_LCD)
#define CONFIG_CMD_BMP
@@ -149,8 +151,8 @@
#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_BASE 0x00000000
#define CONFIG_SYS_FLASH_SIZE 0x800000
@@ -158,6 +160,7 @@
#define CONFIG_SYS_MAX_FLASH_SECT 135
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_TEXT_BASE 0x00000000
#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
@@ -166,7 +169,7 @@
#define CONFIG_SYS_FRAM_BASE 0x08000000
#define CONFIG_SYS_FRAM_SIZE 0x20000
-#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 65536
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
@@ -184,7 +187,7 @@
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
+#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
diff --git a/include/configs/otc570.h b/include/configs/otc570.h
index ca3bf26..9ecb2b0 100644
--- a/include/configs/otc570.h
+++ b/include/configs/otc570.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2010
+ * (C) Copyright 2010-2011
* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
* esd electronic system design gmbh <www.esd.eu>
*
@@ -31,101 +31,119 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-/* Common stuff */
-#define CONFIG_OTC570 1 /* Board is esd OTC570 */
-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
-#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
+/*
+ * Warning: changing CONFIG_SYS_TEXT_BASE requires
+ * adapting the initial boot program.
+ * Since the linker has to swallow that define, we must use a pure
+ * hex number here!
+ */
+#define CONFIG_SYS_TEXT_BASE 0x20002000
+
+/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
#define CONFIG_SYS_HZ 1000 /* decrementer freq */
-#define CONFIG_DISPLAY_BOARDINFO 1
-#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */
-#define CONFIG_PREBOOT /* enable preboot variable */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-#define CONFIG_SERIAL_TAG 1
-#define CONFIG_REVISION_TAG 1
-#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
+/* Misc CPU related */
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
-
#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_SERIAL_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_MISC_INIT_R /* Call misc_init_r */
+#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
+
+#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
+#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
+#define CONFIG_PREBOOT /* enable preboot variable */
/*
* Hardware drivers
*/
-#define CONFIG_AT91_GPIO 1
+
+/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
+#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
+
+/* general purpose I/O */
+#define CONFIG_AT91_GPIO
/* Console output */
-#define CONFIG_ATMEL_USART 1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3 1 /* USART 3 is DBGU */
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CONFIG_USART_ID ATMEL_ID_SYS
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600}
#define CONFIG_BOOTDELAY 3
-#define CONFIG_ZERO_BOOTDELAY_CHECK 1
+#define CONFIG_ZERO_BOOTDELAY_CHECK
/* LCD */
-#define CONFIG_LCD 1
-#define LCD_BPP LCD_COLOR8
-
+#define CONFIG_LCD
#undef CONFIG_SPLASH_SCREEN
-#ifndef CONFIG_SPLASH_SCREEN
-#define CONFIG_LCD_LOGO 1
-#define CONFIG_LCD_INFO 1
-#undef CONFIG_LCD_INFO_BELOW_LOGO
-#endif /* CONFIG_SPLASH_SCREEN */
+#ifdef CONFIG_LCD
+# define LCD_BPP LCD_COLOR8
+
+# ifndef CONFIG_SPLASH_SCREEN
+# define CONFIG_LCD_LOGO
+# define CONFIG_LCD_INFO
+# undef CONFIG_LCD_INFO_BELOW_LOGO
+# endif /* CONFIG_SPLASH_SCREEN */
-#undef LCD_TEST_PATTERN
-#define CONFIG_SYS_WHITE_ON_BLACK 1
-#define CONFIG_ATMEL_LCD 1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
-#define CONFIG_OTC570_LCD_BASE 0x23E00000 /* LCD is in SDRAM */
-#define CONFIG_CMD_BMP 1
+# undef LCD_TEST_PATTERN
+# define CONFIG_SYS_WHITE_ON_BLACK
+# define CONFIG_ATMEL_LCD
+# define CONFIG_SYS_CONSOLE_IS_IN_ENV
+# define CONFIG_OTC570_LCD_BASE (CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
+# define CONFIG_CMD_BMP
+#endif /* CONFIG_LCD */
/* RTC and I2C stuff */
-#define CONFIG_RTC_DS1338 1
+#define CONFIG_RTC_DS1338
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#undef CONFIG_HARD_I2C
-#define CONFIG_SOFT_I2C 1
+#define CONFIG_SOFT_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#ifdef CONFIG_SOFT_I2C
-#define CONFIG_I2C_CMD_TREE 1
-#define CONFIG_I2C_MULTI_BUS 1
+# define CONFIG_I2C_CMD_TREE
+# define CONFIG_I2C_MULTI_BUS
/* Configure data and clock pins for pio */
-#define I2C_INIT { \
+# define I2C_INIT { \
at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
}
-#define I2C_SOFT_DECLARATIONS
+# define I2C_SOFT_DECLARATIONS
/* Configure data pin as output */
-#define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
+# define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
/* Configure data pin as input */
-#define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
+# define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
/* Read data pin */
-#define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
+# define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
/* Set data pin */
-#define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
+# define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
/* Set clock pin */
-#define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
-#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
+# define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
+# define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ZERO_BOOTDELAY_CHECK 1
-
/*
* BOOTP options
*/
-#define CONFIG_BOOTP_BOOTFILESIZE 1
-#define CONFIG_BOOTP_BOOTPATH 1
-#define CONFIG_BOOTP_GATEWAY 1
-#define CONFIG_BOOTP_HOSTNAME 1
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
@@ -135,99 +153,116 @@
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_IMLS
-#define CONFIG_CMD_PING 1
-#define CONFIG_CMD_DHCP 1
-#define CONFIG_CMD_NAND 1
-#define CONFIG_CMD_USB 1
-#define CONFIG_CMD_I2C 1
-#define CONFIG_CMD_DATE 1
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
/* LED */
-#define CONFIG_AT91_LED 1
+#define CONFIG_AT91_LED
-/* SDRAM */
-#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM 0x20000000
+/*
+ * SDRAM: 1 bank, min 32, max 128 MB
+ * Initialized before u-boot gets started.
+ */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
+#define CONFIG_SYS_SDRAM_SIZE 0x04000000
+
+#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
+#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
+
+/*
+ * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
+ * leaving the correct space for initial global data structure above
+ * that address while providing maximum stack area below.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
/* DataFlash */
-#define CONFIG_ATMEL_DATAFLASH_SPI
-#define CONFIG_HAS_DATAFLASH 1
-#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
-#define AT91_SPI_CLK 15000000
-#define DATAFLASH_TCSS (0x1a << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
+#ifdef CONFIG_SYS_USE_DATAFLASH
+# define CONFIG_ATMEL_DATAFLASH_SPI
+# define CONFIG_HAS_DATAFLASH
+# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
+# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
+# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
+# define AT91_SPI_CLK 15000000
+# define DATAFLASH_TCSS (0x1a << 16)
+# define DATAFLASH_TCHS (0x1 << 24)
+#endif
/* NOR flash is not populated, disable it */
-#define CONFIG_SYS_NO_FLASH 1
+#define CONFIG_SYS_NO_FLASH
/* NAND flash */
#ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_ATMEL
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x40000000
-#define CONFIG_SYS_NAND_DBW_8 1
-/* our ALE is AD21 */
-#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
-/* our CLE is AD22 */
-#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
-#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
+# define CONFIG_NAND_ATMEL
+# define CONFIG_SYS_MAX_NAND_DEVICE 1
+# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
+# define CONFIG_SYS_NAND_DBW_8
+# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
+# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
+# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
+# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
+# define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
#endif
/* Ethernet */
-#define CONFIG_MACB 1
-#define CONFIG_RMII 1
-#define CONFIG_NET_MULTI 1
+#define CONFIG_MACB
+#define CONFIG_RMII
+#define CONFIG_NET_MULTI
+#define CONFIG_FIT
#define CONFIG_NET_RETRY_COUNT 20
#undef CONFIG_RESET_PHY_R
/* USB */
#define CONFIG_USB_ATMEL
-#define CONFIG_USB_OHCI_NEW 1
-#define CONFIG_DOS_PARTITION 1
-#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_DOS_PARTITION
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
-#define CONFIG_USB_STORAGE 1
-#define CONFIG_CMD_FAT 1
-
-#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END 0x23e00000
-
-#define CONFIG_SYS_USE_DATAFLASH 1
-#undef CONFIG_SYS_USE_NANDFLASH
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_FAT
/* CAN */
-#define CONFIG_AT91_CAN 1
+#define CONFIG_AT91_CAN
/* hw-controller addresses */
-#define CONFIG_ET1100_BASE 0x70000000
+#define CONFIG_ET1100_BASE 0x70000000 /* ATMEL_BASE_CS6 */
+
+#ifdef CONFIG_SYS_USE_DATAFLASH
/* bootstrap + u-boot + env in dataflash on CS0 */
-#define CONFIG_ENV_IS_IN_DATAFLASH 1
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
+# define CONFIG_ENV_IS_IN_DATAFLASH
+# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
0x8400)
-#define CONFIG_ENV_OFFSET 0x4200
-#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
+# define CONFIG_ENV_OFFSET 0x4200
+# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_SIZE 0x4200
+# define CONFIG_ENV_SIZE 0x4200
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
+#elif CONFIG_SYS_USE_NANDFLASH
+
+/* bootstrap + u-boot + env + linux in nandflash */
+# define CONFIG_ENV_IS_IN_NAND 1
+# define CONFIG_ENV_OFFSET 0xC0000
+# define CONFIG_ENV_SIZE 0x20000
+
+#endif
#define CONFIG_SYS_PROMPT "=> "
-#define CONFIG_SYS_CBSIZE 256
+#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
/*
* Size of malloc() pool
@@ -238,7 +273,7 @@
#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
-#error CONFIG_USE_IRQ not supported
+# error CONFIG_USE_IRQ not supported
#endif
#endif
diff --git a/include/dataflash.h b/include/dataflash.h
index 63b3bf9..96ac097 100644
--- a/include/dataflash.h
+++ b/include/dataflash.h
@@ -34,7 +34,6 @@
#define _DataFlash_h
-#include <asm/arch/hardware.h>
#include "config.h"
/*number of protected area*/