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author | Stefan Roese <sr@denx.de> | 2010-09-14 09:38:18 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2010-09-23 08:43:56 +0200 |
commit | ab25e880ca9d508b7a807aa969105af32c3e6e51 (patch) | |
tree | e62fc4dc3265d01915badb5001c4313404ee47ab /include/ppc4xx.h | |
parent | 6aa9195daecf18f682a825213a08d28224644b93 (diff) | |
download | u-boot-imx-ab25e880ca9d508b7a807aa969105af32c3e6e51.zip u-boot-imx-ab25e880ca9d508b7a807aa969105af32c3e6e51.tar.gz u-boot-imx-ab25e880ca9d508b7a807aa969105af32c3e6e51.tar.bz2 |
ppc4xx: POST UART: Use in/out_8() io-accessor functions
This patch fixes a problem in the PPC4xx POST UART driver. This driver
incorrectly used the in/out8() io-accessor functions. This could lead to
problems since these functions don't guarantee execution ordering. This
patch now replaces these functions with the correct ones.
Additionally the driver is converted to using the NS16550 struct instead
of macros for the register offsets.
And some common code is factored out for better maintainability.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc4xx.h')
-rw-r--r-- | include/ppc4xx.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/ppc4xx.h b/include/ppc4xx.h index ee30a4c..5238d04 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -99,6 +99,16 @@ #endif /* 440EP/EPX 440GR/GRX 440SP/SPE 460EX/GT/SX 405EX*/ +/* + * Define ns16550 register offset for all PPC4xx SoC's. Some + * mostly FPGA based PPC4xx implementations use a different + * offset. So let's give them a chance to define their offset + * in the board config header. + */ +#if !defined(CONFIG_SYS_NS16550_REG_SIZE) +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#endif + #if defined(CONFIG_440) #include <ppc440.h> #else |