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| author | Stefan Agner <stefan.agner@toradex.com> | 2016-08-14 21:33:01 -0700 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-08-26 17:04:56 -0400 |
| commit | 8f894a4d38adff26733225fb170f2a2d3e2b3054 (patch) | |
| tree | ce5df402c6be75e7db1883b2eae3cc2a2fbd8bf9 /include/mtd.h | |
| parent | c5b3cabf4a2f78b126a7da92c20b781a52d5307f (diff) | |
| download | u-boot-imx-8f894a4d38adff26733225fb170f2a2d3e2b3054.zip u-boot-imx-8f894a4d38adff26733225fb170f2a2d3e2b3054.tar.gz u-boot-imx-8f894a4d38adff26733225fb170f2a2d3e2b3054.tar.bz2 | |
arm: cache: always flush cache line size for page table
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through mmu_set_region_dcache_behaviour.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'include/mtd.h')
0 files changed, 0 insertions, 0 deletions