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authorPeng Fan <van.freenix@gmail.com>2016-08-11 14:02:51 +0800
committerStefano Babic <sbabic@denx.de>2016-10-04 15:41:01 +0200
commit07e1c0ae83faff57477392be87734128db5e1b14 (patch)
tree84d433be88cbd55b97ca541a199eed599ea57435 /include/msc01.h
parent5b66482d44b4e9571c64285254a43bdfe9ed1262 (diff)
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imx: iomux: fix snvs usage for i.MX6ULL
SNVS TAMPER pin and BOOT MODE pins are in SNVS IOMUXC module, not in IOMUXC, so correct the related registers' offset. Use IOMUX_CONFIG_LPSR flag for these pins, so we can differentiate them from iomuxc pins. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
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