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| author | Paul Burton <paul.burton@imgtec.com> | 2016-05-27 14:28:06 +0100 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-05-31 09:44:24 +0200 |
| commit | fb64cda579985e21610672eae44faf40eadd71ea (patch) | |
| tree | cf09504ff3e799d5f2797c39d0bbfc1c49e18b1d /include/mpc86xx.h | |
| parent | 372286217f050bfd57695001d59f618c52822f40 (diff) | |
| download | u-boot-imx-fb64cda579985e21610672eae44faf40eadd71ea.zip u-boot-imx-fb64cda579985e21610672eae44faf40eadd71ea.tar.gz u-boot-imx-fb64cda579985e21610672eae44faf40eadd71ea.tar.bz2 | |
MIPS: Abstract cache op loops with a macro
The various cache maintenance routines perform a number of loops over
cache lines. Rather than duplicate the code for performing such loops,
abstract it out into a new cache_loop macro which performs an arbitrary
number of cache ops on a range of addresses. This reduces duplication in
the existing L1 cache maintenance code & will allow for not adding
further duplication when introducing L2 cache support.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'include/mpc86xx.h')
0 files changed, 0 insertions, 0 deletions