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author | J. German Rivera <German.Rivera@freescale.com> | 2015-01-06 13:19:02 -0800 |
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committer | York Sun <yorksun@freescale.com> | 2015-02-24 13:10:20 -0800 |
commit | 7b3bd9a7988a8b4c8ba22a52b4927e8e59819b12 (patch) | |
tree | 665c5303c5e8d4357d0bd4b2cc7b5f97e56b8291 /include/fsl-mc/fsl_mc.h | |
parent | 4f2532c4a4a34f0241ef9bc921044772f19f928d (diff) | |
download | u-boot-imx-7b3bd9a7988a8b4c8ba22a52b4927e8e59819b12.zip u-boot-imx-7b3bd9a7988a8b4c8ba22a52b4927e8e59819b12.tar.gz u-boot-imx-7b3bd9a7988a8b4c8ba22a52b4927e8e59819b12.tar.bz2 |
drivers/mc: Migrated MC Flibs to 0.5.2
Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory
fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree
from "fsl,dprcr" to "fsl-mc". Print MC version info when
appropriate.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/fsl-mc/fsl_mc.h')
-rw-r--r-- | include/fsl-mc/fsl_mc.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h new file mode 100644 index 0000000..b9f089e --- /dev/null +++ b/include/fsl-mc/fsl_mc.h @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_MC_H__ +#define __FSL_MC_H__ + +#include <common.h> + +#define MC_CCSR_BASE_ADDR \ + ((struct mc_ccsr_registers __iomem *)0x8340000) + +#define BIT(x) (1 << (x)) +#define GCR1_P1_STOP BIT(31) +#define GCR1_P2_STOP BIT(30) +#define GCR1_P1_DE_RST BIT(23) +#define GCR1_P2_DE_RST BIT(22) +#define GCR1_M1_DE_RST BIT(15) +#define GCR1_M2_DE_RST BIT(14) +#define GCR1_M_ALL_DE_RST (GCR1_M1_DE_RST | GCR1_M2_DE_RST) +#define GSR_FS_MASK 0x3fffffff +#define MCFAPR_PL_MASK (0x1 << 18) +#define MCFAPR_BMT_MASK (0x1 << 17) +#define MCFAPR_BYPASS_ICID_MASK \ + (MCFAPR_PL_MASK | MCFAPR_BMT_MASK) + +#define SOC_MC_PORTALS_BASE_ADDR ((void __iomem *)0x00080C000000) +#define SOC_MC_PORTAL_STRIDE 0x10000 + +#define SOC_MC_PORTAL_ADDR(_portal_id) \ + ((void __iomem *)((uintptr_t)SOC_MC_PORTALS_BASE_ADDR + \ + (_portal_id) * SOC_MC_PORTAL_STRIDE)) + +struct mc_ccsr_registers { + u32 reg_gcr1; + u32 reserved1; + u32 reg_gsr; + u32 reserved2; + u32 reg_sicbalr; + u32 reg_sicbahr; + u32 reg_sicapr; + u32 reserved3; + u32 reg_mcfbalr; + u32 reg_mcfbahr; + u32 reg_mcfapr; + u32 reserved4[0x2f1]; + u32 reg_psr; + u32 reserved5; + u32 reg_brr[2]; + u32 reserved6[0x80]; + u32 reg_error[]; +}; + +int mc_init(bd_t *bis); + +int get_mc_boot_status(void); +#endif |