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authorBin Meng <bmeng.cn@gmail.com>2015-05-25 22:35:04 +0800
committerSimon Glass <sjg@chromium.org>2015-06-04 02:39:39 -0600
commit9c7dea602edd9027848d312e9b3b69f06c15f163 (patch)
tree4893732c170a3a889b819482f7003491ecbac11c /include/fdtdec.h
parent2aa3a7fb1c24afd4c0e12360acccf3234d8fe019 (diff)
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x86: Refactor PIRQ routing support
PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/fdtdec.h')
-rw-r--r--include/fdtdec.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 6bf5f61..64c7fa1 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -178,6 +178,7 @@ enum fdt_compat_id {
COMPAT_INTEL_QRK_MRC, /* Intel Quark MRC */
COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */
COMPAT_INTEL_PCH, /* Intel PCH */
+ COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */
COMPAT_COUNT,
};