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authorAsen Dimov <dimov@ronetix.at>2011-06-08 22:01:37 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-03 22:40:45 +0200
commiteb6e608b32b92fad645979894c71ffd15b4cb20a (patch)
tree212d34d47b226cc24d4064db9b3cd446e273f425 /include/configs
parent684a567ace2bc5673d52b2cb4f517909f5481153 (diff)
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make pm9g45 buildable for v2011.06 release
Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de> changed at91_serial_hw_init to at91_seriald_hw_init
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/pm9g45.h16
1 files changed, 11 insertions, 5 deletions
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index ec51ccf..672f663 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -32,15 +32,20 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
+
#define CONFIG_PM9G45 1 /* It's an Ronetix PM9G45 */
-#define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC */
+#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45"
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_HZ 1000
-#define CONFIG_SYS_TEXT_BASE 0x73f00000
-#define CONFIG_AT91FAMILY
+#define CONFIG_SYS_TEXT_BASE 0x73f00000
#define CONFIG_ARCH_CPU_INIT
@@ -55,7 +60,8 @@
*/
#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
-#define CONFIG_USART3 1 /* USART 3 is DBGU */
+#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CONFIG_USART_ID ATMEL_ID_SYS
#define CONFIG_SYS_USE_NANDFLASH 1