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authorEnric Balletbo i Serra <enric.balletbo@collabora.com>2016-05-03 08:59:24 +0200
committerTom Rini <trini@konsulko.com>2016-05-03 12:17:13 -0400
commite7fbcbc2566ab4bbcb07889a5791972ac49fa407 (patch)
tree7ad331a83b49e2ea694073d79052389fc7b172ef /include/configs
parent8edeac86db306482b9bcb860d572320a8c3ed95d (diff)
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igep00x0: Use the SRAM available for SPL.
Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear what the limit is. This will also help some compilers to fit all the code into the allocated space. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/omap3_igep00x0.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 5da50a5..9bd8915 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -19,6 +19,13 @@
#include <configs/ti_omap3_common.h>
#include <asm/mach-types.h>
+/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
+#undef CONFIG_SPL_MAX_SIZE
+#undef CONFIG_SPL_TEXT_BASE
+
+#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE 0x40200000
+
/*
* Display CPU and Board information
*/