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| author | Jerry Huang <Chang-Ming.Huang@freescale.com> | 2011-11-03 14:46:12 +0800 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:56 -0500 |
| commit | d37be07ee57e4390eb4e5529f9a481e334dbbe07 (patch) | |
| tree | 10ddc19b939c93b3eb219c9fe7a27475492bec15 /include/configs | |
| parent | 2e651b248348e156d193e46f7a5b827d74af90d6 (diff) | |
| download | u-boot-imx-d37be07ee57e4390eb4e5529f9a481e334dbbe07.zip u-boot-imx-d37be07ee57e4390eb4e5529f9a481e334dbbe07.tar.gz u-boot-imx-d37be07ee57e4390eb4e5529f9a481e334dbbe07.tar.bz2 | |
powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds
The new MPC8360EMDS board supports 512MB DDR since 2008.
For 512MB DDR:
BAT0 is used for the first 256MB memory, BAT4 is used for the second
256MB memory and the address space of SDRAM follows the DDR, so if the
size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of
DDR is 512MB, the BAT4 will be used for the second 256MB memory and
there is no BAT for SDRAM.
Therefore, if the size of DDR is 512MB, this patch will use BAT6 for
SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the
codes relocates to the DDR.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/MPC8360EMDS.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index e81f3d4..5a1e6f5 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Copyright (C) 2006,2011 Freescale Semiconductor, Inc. * * Dave Liu <daveliu@freescale.com> * @@ -569,6 +569,7 @@ */ #define CONFIG_HIGH_BATS 1 /* High BATs supported */ +#define CONFIG_BAT_RW /* DDR/LBC SDRAM: cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ |