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authorSimon Glass <sjg@chromium.org>2014-10-22 21:37:15 -0600
committerSimon Glass <sjg@chromium.org>2014-10-23 19:29:07 -0600
commitb3f4ca1135edd66d14254089bbeb8077c6d0bb72 (patch)
treec4ddf862f38264189353f6f56069fe5294782ec5 /include/configs
parent1a44cd89faec48bc80543ed4cf2afc614863068b (diff)
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dm: omap3: Move to driver model for GPIO and serial
Adjust the configuration for the am33xx boards, including beagleboard, to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ti_omap3_common.h19
1 files changed, 16 insertions, 3 deletions
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 3b19d3d..3c634ee 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -18,6 +18,15 @@
#include <asm/arch/cpu.h>
#include <asm/arch/omap3.h>
+#ifndef CONFIG_SPL_BUILD
+# define CONFIG_DM
+# define CONFIG_CMD_DM
+# define CONFIG_DM_GPIO
+# define CONFIG_DM_SERIAL
+# define CONFIG_OMAP_SERIAL
+# define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
+#endif
+
/* The chip has SDRC controller */
#define CONFIG_SDRC
@@ -28,16 +37,20 @@
/* NS16550 Configuration */
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
+#ifdef CONFIG_SPL_BUILD
+# define CONFIG_SYS_NS16550_SERIAL
+# define CONFIG_SYS_NS16550_REG_SIZE (-4)
+# define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
+#endif
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}
/* Select serial console configuration */
#define CONFIG_CONS_INDEX 3
+#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3
+#endif
/* Physical Memory Map */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0