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authorSandeep Paulraj <s-paulraj@ti.com>2010-12-28 17:38:22 -0500
committerAlbert Aribaud <albert.aribaud@free.fr>2011-02-02 00:54:44 +0100
commitb157dd51de35405940b5b6454f6e5b0bf3abd102 (patch)
tree9d525564eb29fc6ca957ed353f9e847adcdce6e3 /include/configs
parent04f15b3b1ab7f80c538e4eb47cd65def760b8dd5 (diff)
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DaVinci DM6467: Enhance board Support
Support for DM6467 was incomplete and the build failed as well. Patches were sent to the list but have not been added. This enhances the DM6467 support. Some more patches will need to be sent to bring it in line with what is available in internal TI trees Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/davinci_dm6467evm.h30
1 files changed, 28 insertions, 2 deletions
diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h
index 3ef4555..a0a30f5 100644
--- a/include/configs/davinci_dm6467evm.h
+++ b/include/configs/davinci_dm6467evm.h
@@ -22,13 +22,26 @@
/* Spectrum Digital TMS320DM6467 EVM board */
#define DAVINCI_DM6467EVM
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_SYS_USE_NAND
+#define CONFIG_SYS_NAND_SMALLPAGE
#define CONFIG_SKIP_LOWLEVEL_INIT
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU */
+
+/* Clock rates detection */
+#ifndef __ASSEMBLY__
+extern unsigned int davinci_arm_clk_get(void);
+#endif
+
+#define CFG_REFCLK_FREQ 27000000
+/* Arm Clock frequency */
+#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get()
+/* Timer Input clock freq */
+#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2)
#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
-#define CONFIG_SYS_HZ_CLOCK 27000000
#define CONFIG_SYS_HZ 1000
#define CONFIG_SOC_DM646X
@@ -69,6 +82,18 @@
#define CONFIG_SYS_I2C_SPEED 80000
#define CONFIG_SYS_I2C_SLAVE 10
+/* Network & Ethernet Configuration */
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_EMAC_MDIO_PHY_NUM 1
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_NET_MULTI
+#define CONFIG_CMD_NET
+
/* Flash & Environment */
#define CONFIG_SYS_NO_FLASH
#ifdef CONFIG_SYS_USE_NAND
@@ -116,7 +141,8 @@
#define CONFIG_CMD_MII
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_EEPROM
-#undef CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR