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authorTang Yuantian <Yuantian.Tang@freescale.com>2015-05-14 17:20:28 +0800
committerYork Sun <yorksun@freescale.com>2015-08-03 12:06:36 -0700
commit99e1bd4241262440dce8950ccadb9d8588b0479b (patch)
tree124009209602f535a25d5637f63dd6b7e1d36bc6 /include/configs
parent562583deb3ff6cac0833c91c7cc0c24f0d7e0413 (diff)
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armv7/ls1021atwr: added deep sleep support in uboot
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ls1021atwr.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index a277a2d..df7af3c 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -18,6 +18,10 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DEEP_SLEEP
+#ifdef CONFIG_DEEP_SLEEP
+#define CONFIG_SILENT_CONSOLE
+#endif
/*
* Size of malloc() pool
@@ -95,6 +99,10 @@
#define DDR_DDR_ZQ_CNTL 0x89080600
#define DDR_CS0_CONFIG_2 0
#define DDR_SDRAM_CFG_MEM_EN 0x80000000
+#define SDRAM_CFG2_D_INIT 0x00000010
+#define DDR_CDR2_VREF_TRAIN_EN 0x00000080
+#define SDRAM_CFG2_FRC_SR 0x80000000
+#define SDRAM_CFG_BI 0x00000001
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021atwr/ls102xa_pbi.cfg
@@ -121,7 +129,8 @@
#define CONFIG_SPL_PAD_TO 0x1c000
#define CONFIG_SYS_TEXT_BASE 0x82000000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
+#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE + \
+ CONFIG_SYS_MONITOR_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
#define CONFIG_SPL_BSS_START_ADDR 0x80100000
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000