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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2011-08-04 02:48:56 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-09-03 22:40:44 +0200
commit65b0f87a806f849670cbe23e7bbda15314621d70 (patch)
tree8c328a9e0491277ae61cb8c61ba968ab4b059847 /include/configs
parent6785c7c84ad6803587b247f363fe977d3e0775fb (diff)
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tny_a9260/tny_a9g20: update board to the new AT91 organization
Cc: Albin Tonnerre <tonnerrealbin@gmail.com> CC: Gregory Hermant <gregory.hermant@calao-systems.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/tny_a9260.h85
1 files changed, 42 insertions, 43 deletions
diff --git a/include/configs/tny_a9260.h b/include/configs/tny_a9260.h
index 7b18022..986aeba 100644
--- a/include/configs/tny_a9260.h
+++ b/include/configs/tny_a9260.h
@@ -30,19 +30,11 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_AT91_LEGACY
-
-#if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9260_EEPROM)
-#define CONFIG_TNY_A9260
-#elif defined(CONFIG_TNY_A9G20_NANDFLASH) || defined(CONFIG_TNY_A9G20_EEPROM)
-#define CONFIG_TNY_A9G20
-#endif
-
-#ifdef CONFIG_TNY_A9260
-#define CONFIG_AT91SAM9260
-#else
-#define CONFIG_AT91SAM9G20
-#endif
+/*
+ * SoC must be defined first, before hardware.h is included.
+ * In this case SoC is defined in boards.cfg.
+ */
+#include <asm/hardware.h>
#if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH)
#define CONFIG_ENV_IS_IN_NAND
@@ -50,29 +42,36 @@
#define CONFIG_ENV_IS_IN_EEPROM
#endif
+/* Define actual evaluation board type from used processor type */
+#ifdef CONFIG_AT91SAM9G20
+# define CONFIG_TNY_A9G20
+#else
+# define CONFIG_TNY_A9260
+#endif
+
/* ARM asynchronous clock */
+#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
-#define CONFIG_SYS_HZ 1000
+#define CONFIG_SYS_HZ 1000
-#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#define CONFIG_ARCH_CPU_INIT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
/*
* Hardware drivers
*/
-#define CONFIG_AT91_GPIO 1
-#define CONFIG_ATMEL_USART 1
-#undef CONFIG_USART0
-#undef CONFIG_USART1
-#undef CONFIG_USART2
-#define CONFIG_USART3 1 /* USART 3 is DBGU */
+#define CONFIG_ATMEL_LEGACY
+#define CONFIG_AT91_GPIO
+
+#define CONFIG_ATMEL_USART
+#define CONFIG_USART_BASE ATMEL_BASE_DBGU
+#define CONFIG_USART_ID ATMEL_ID_SYS
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
#define CONFIG_BOOTDELAY 3
@@ -86,13 +85,16 @@
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_USB
/* SDRAM */
#define CONFIG_NR_DRAM_BANKS 1
-#define PHYS_SDRAM 0x20000000
-#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
+#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
+#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
+# define CONFIG_SYS_INIT_SP_ADDR \
+ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
/* SPI EEPROM */
#define CONFIG_SPI
@@ -109,8 +111,8 @@
#define CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x40000000
-#define CONFIG_SYS_NAND_DBW_8 1
+#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
+#define CONFIG_SYS_NAND_DBW_8
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
@@ -119,27 +121,27 @@
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
/* NOR flash - no real flash on this board */
-#define CONFIG_SYS_NO_FLASH 1
+#define CONFIG_SYS_NO_FLASH
-#define CONFIG_DOS_PARTITION 1
-#define CONFIG_CMD_FAT 1
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
-#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END 0x23e00000
/* Env in EEPROM, bootstrap + u-boot in NAND*/
#ifdef CONFIG_ENV_IS_IN_EEPROM
#define CONFIG_ENV_OFFSET 0x20
-#define CONFIG_ENV_SIZE 0x1000
+#define CONFIG_ENV_SIZE 0x1000
#endif
/* Env, bootstrap and u-boot in NAND */
#ifdef CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET 0x60000
-#define CONFIG_ENV_OFFSET_REDUND 0x80000
-#define CONFIG_ENV_SIZE 0x20000
+#define CONFIG_ENV_OFFSET 0x60000
+#define CONFIG_ENV_OFFSET_REDUND 0x80000
+#define CONFIG_ENV_SIZE 0x20000
#endif
#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
@@ -149,15 +151,12 @@
"120M(rootfs),-(other) " \
"rw rootfstype=jffs2"
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
-
#define CONFIG_SYS_PROMPT "U-Boot> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LONGHELP 1
-#define CONFIG_CMDLINE_EDITING 1
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CMDLINE_EDITING
/*
* Size of malloc() pool