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| author | Haiying Wang <Haiying.Wang@freescale.com> | 2008-10-03 12:37:41 -0400 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:05 +0200 |
| commit | 4ca06607d60d0a6378812ef58fd1eab2a7f77111 (patch) | |
| tree | e145c64ad608f727c0d0f2cbcb54cbeca1c507eb /include/configs | |
| parent | 1f293b417ac6ab8e317ca2b770377ca93edf2370 (diff) | |
| download | u-boot-imx-4ca06607d60d0a6378812ef58fd1eab2a7f77111.zip u-boot-imx-4ca06607d60d0a6378812ef58fd1eab2a7f77111.tar.gz u-boot-imx-4ca06607d60d0a6378812ef58fd1eab2a7f77111.tar.bz2 | |
Add ddr interleaving suppport for MPC8572DS board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.
* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.
* Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/MPC8572DS.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index c2ed961..c2606fa 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -61,7 +61,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #endif #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* sysclk for MPC85xx */ #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ -#define CONFIG_ICS307_REFCLK_HZ 33333333 /* ICS307 clock chip ref freq */ +#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ #define CONFIG_GET_CLK_FROM_ICS307 /* decode sysclk and ddrclk freq from ICS307 instead of switches */ @@ -549,6 +549,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_BAUDRATE 115200 #define CONFIG_EXTRA_ENV_SETTINGS \ + "memctl_intlv_ctl=2\0" \ "netdev=eth0\0" \ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ |