summaryrefslogtreecommitdiff
path: root/include/configs
diff options
context:
space:
mode:
authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-04-21 14:43:19 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2016-04-24 09:54:09 +0900
commit2386969808c1694bb633804aff010294cb7e8573 (patch)
tree143dac08b0816d0f63d5b08adcb891d2ae7fc7af /include/configs
parent9d0c2ceb35be7016977560a92fc67e3e704e5c9f (diff)
downloadu-boot-imx-2386969808c1694bb633804aff010294cb7e8573.zip
u-boot-imx-2386969808c1694bb633804aff010294cb7e8573.tar.gz
u-boot-imx-2386969808c1694bb633804aff010294cb7e8573.tar.bz2
ARM: uniphier: reserve the last 64 byte of SDRAM
The last 64 byte of each DDR channel of PH1-LD20 is periodically used as a scratch area for the DDR PHY training. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/uniphier.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index fb405a9..a25ac8d 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -259,6 +259,8 @@
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_NR_DRAM_BANKS 2
+/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
+#define CONFIG_SYS_MEM_TOP_HIDE 64
#if defined(CONFIG_ARM64)
#define CONFIG_SPL_TEXT_BASE 0x30000000