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| author | Heiko Schocher <hs@denx.de> | 2015-08-21 18:55:07 +0200 |
|---|---|---|
| committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-09-11 09:35:38 +0200 |
| commit | 0ed366ffba3cc0d5454ba7ad40e99d5f6fb92638 (patch) | |
| tree | a2f13f95f1b856dfa61f854ba5513d7223b48558 /include/configs | |
| parent | 4054082397d3752d985ae991531e2fec51c6dc82 (diff) | |
| download | u-boot-imx-0ed366ffba3cc0d5454ba7ad40e99d5f6fb92638.zip u-boot-imx-0ed366ffba3cc0d5454ba7ad40e99d5f6fb92638.tar.gz u-boot-imx-0ed366ffba3cc0d5454ba7ad40e99d5f6fb92638.tar.bz2 | |
taurus: board updates
taurus changes:
- rename at91_spl_board_init to spl_board_init
fixes problems with recovery button and nand erase sector 0
- adapt CONFIG_SPL_MAX_SIZE and CONFIG_SPL_BSS_MAX_SIZE
- add CONFIG_AT91_HW_WDT_TIMEOUT 15
- CONFIG_SF_DEFAULT_MODE SPI_MODE_3 not mode 0
Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/taurus.h | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/include/configs/taurus.h b/include/configs/taurus.h index fb7c575..c1fed9a 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -81,14 +81,14 @@ */ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) +#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) /* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, * leaving the correct space for initial global data structure above * that address while providing maximum stack area below. */ -# define CONFIG_SYS_INIT_SP_ADDR \ +#define CONFIG_SYS_INIT_SP_ADDR \ (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ @@ -112,6 +112,7 @@ #define CONFIG_AT91_WANTS_COMMON_PHY #define CONFIG_AT91SAM9_WATCHDOG +#define CONFIG_AT91_HW_WDT_TIMEOUT 15 #if !defined(CONFIG_SPL_BUILD) /* Enable the watchdog */ #define CONFIG_HW_WATCHDOG @@ -146,8 +147,8 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_SPEED 10000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 1000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 #endif /* load address */ @@ -157,7 +158,7 @@ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_ENV_OFFSET_REDUND 0x180000 -#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ +#define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" #if defined(CONFIG_BOARD_TAURUS) @@ -241,7 +242,7 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN \ - ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) + ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, 0x1000) /* Defines for SPL */ #define CONFIG_SPL_FRAMEWORK @@ -253,7 +254,7 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE -#define CONFIG_SPL_BSS_MAX_SIZE (3 * 1024) +#define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT @@ -275,9 +276,9 @@ #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_SIZE (256*1024*1024) -#define CONFIG_SYS_NAND_PAGE_SIZE 2048 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) +#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K +#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS |