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authorStefan Roese <sr@denx.de>2007-10-05 07:57:20 +0200
committerStefan Roese <sr@denx.de>2007-10-31 21:20:49 +0100
commit4dbee8a90df613eb517aadbecebd70f168913d30 (patch)
tree9374152d0f94308b156947548f503830c6763005 /include/configs/yucca.h
parent6d95289281ed2958ebf76d2b55f86bbd88591fd2 (diff)
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ppc4xx: 4xx_pcie: Change CFG_PCIE_MEMSIZE to 128MB on Yucca & Katmai
128MB seems to be the smallest possible value for the memory size for on PCIe port. With this change now the BAR's of the PCIe cards are accessible under U-Boot. One big note: This only works for PCIe port 0 & 1. For port 2 this currently doesn't work, since the base address is now 0xc0000000 (0xb0000000 + 2 * 0x08000000), and this is already occupied by CFG_PCIE0_CFGBASE. But solving this issue for port 2 would mean to change the base addresses completely and this change would have too much impact right now. This patch adds debug output to the 4xx pcie driver too. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/yucca.h')
-rw-r--r--include/configs/yucca.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 74033b4..6caf21b 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -64,7 +64,7 @@
#define CFG_PCI_TARGBASE CFG_PCI_MEMBASE
#define CFG_PCIE_MEMBASE 0xb0000000 /* mapped PCIe memory */
-#define CFG_PCIE_MEMSIZE 0x01000000
+#define CFG_PCIE_MEMSIZE 0x08000000 /* smallest incr for PCIe port */
#define CFG_PCIE_BASE 0xe0000000 /* PCIe UTL regs */
#define CFG_PCIE0_CFGBASE 0xc0000000