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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-09-22 00:27:36 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-09-25 00:27:53 +0900 |
commit | fcbcd59730255018dbe78af9294598273a85a0de (patch) | |
tree | 6ca5a91bea033ed8545fa9566d765627bdb266ab /include/configs/uniphier.h | |
parent | 257b11f32d0ba451b8b7eba72f0db5e182d425dd (diff) | |
download | u-boot-imx-fcbcd59730255018dbe78af9294598273a85a0de.zip u-boot-imx-fcbcd59730255018dbe78af9294598273a85a0de.tar.gz u-boot-imx-fcbcd59730255018dbe78af9294598273a85a0de.tar.bz2 |
ARM: uniphier: fix glitch signal problem for low-level debug
Currently, IECTRL is enabled after pin-mux settings for the low-level
debugging for PH1-LD4 and PH1-sLD8. While IECTRL is disabled, input
signals are pulled-down, i.e. glitch signal (Low to High transition)
problem occurs if pin-mux is set up first. As a result, one invalid
character is input to the UART block and the auto-boot counting is
terminated immediately.
The correct initialization procedure is:
[1] Enable IECTRL (if IECTRL exists for the pins)
[2] Set up pin-muxing
[3] Deassert the reset of the hardware block
Currently, the low-level debugging is working for PH1-sLD3 and
PH1-Pro4, but just in case, follow the sequence for all the SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'include/configs/uniphier.h')
0 files changed, 0 insertions, 0 deletions