diff options
author | Tom Rini <trini@konsulko.com> | 2015-12-19 22:05:31 -0500 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2015-12-19 22:05:31 -0500 |
commit | 34059d8f502dec034af2387c7d00a56ccab99a9e (patch) | |
tree | 0227cccae15473da34e95acf35140ef8be3f4643 /include/configs/socfpga_common.h | |
parent | 1c0e84ca829a09948a61107744402296566aa076 (diff) | |
parent | 48275c96ff4deaeca10d9e18c78f6a1e3653efa2 (diff) | |
download | u-boot-imx-34059d8f502dec034af2387c7d00a56ccab99a9e.zip u-boot-imx-34059d8f502dec034af2387c7d00a56ccab99a9e.tar.gz u-boot-imx-34059d8f502dec034af2387c7d00a56ccab99a9e.tar.bz2 |
Merge branch 'master' of git://www.denx.de/git/u-boot-socfpga
Diffstat (limited to 'include/configs/socfpga_common.h')
-rw-r--r-- | include/configs/socfpga_common.h | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index b0bc689..3a4df63 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -3,8 +3,8 @@ * * SPDX-License-Identifier: GPL-2.0+ */ -#ifndef __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ -#define __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ +#ifndef __CONFIG_SOCFPGA_COMMON_H__ +#define __CONFIG_SOCFPGA_COMMON_H__ /* Virtual target or real hardware */ @@ -69,6 +69,10 @@ #define CONFIG_CMDLINE_EDITING /* Command history etc */ #define CONFIG_SYS_HUSH_PARSER +#ifndef CONFIG_SYS_HOSTNAME +#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD +#endif + /* * Cache */ @@ -229,13 +233,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_CMD_USB #define CONFIG_USB_DWC2 #define CONFIG_USB_STORAGE -/* - * NOTE: User must define either of the following to select which - * of the two USB controllers available on SoCFPGA to use. - * The DWC2 driver doesn't support multiple USB controllers. - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS - * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS - */ #endif /* @@ -262,7 +259,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM #define CONFIG_G_DNL_UMS_PRODUCT_NUM CONFIG_G_DNL_PRODUCT_NUM #ifndef CONFIG_G_DNL_MANUFACTURER -#define CONFIG_G_DNL_MANUFACTURER "Altera" +#define CONFIG_G_DNL_MANUFACTURER CONFIG_SYS_VENDOR #endif #endif @@ -326,4 +323,4 @@ unsigned int cm_get_qspi_controller_clk_hz(void); */ #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#endif /* __CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ */ +#endif /* __CONFIG_SOCFPGA_COMMON_H__ */ |